Return the rotation vector quaternion I

Return the rotation vector quaternion J

Return the rotation vector quaternion K

Return the rotation vector accuracy

Return the rotation vector quaternion Real

Given a record ID, read the range value from the metaData record in the FRS for a given sensor

Get gyroscope output rate divider. * The sensor register output, FIFO output, DMP sampling, Motion detection, Zero * Motion detection, and Free Fall

Get gyroscope output rate divider. * The sensor register output, FIFO output, DMP sampling, Motion detection, Zero * Motion detection, and Free Fall

Return raw mems value for the accel

Return raw mems value for the accel

Return raw mems value for the accel

Return raw mems value for the gyro

Return raw mems value for the mag

Given a record ID, read the resolution value from the metaData record in the FRS for a given sensor

! * @brief Gets the chip revision numbers * @param info * revision info */

Quaternion to Euler conversion https://en.wikipedia.org/wiki/Conversion_between_quaternions_and_Euler_angles https://github.com/sparkfun/SparkFun_MPU-

Get 3-axis gyroscope readings. * These gyroscope measurement registers, along with the accelerometer * measurement registers, temperature measuremen

Get X-axis gyroscope reading. * @return X-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU6050_RA_GYRO_XOUT

Get X-axis gyroscope reading. * @return X-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU9250_RA_GYRO_XOUT

Get Y-axis gyroscope reading. * @return Y-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU6050_RA_GYRO_YOUT

Get Y-axis gyroscope reading. * @return Y-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU9250_RA_GYRO_YOUT

Get Z-axis gyroscope reading. * @return Z-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU6050_RA_GYRO_ZOUT

Get Z-axis gyroscope reading. * @return Z-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU9250_RA_GYRO_ZOUT

! * @brief Reads the sensor's offset registers into a byte array * @param calibData * Calibration offset (buffer size should be 22) *

Get last available byte read from Slave 4. * This register stores the data read from Slave 4. This field is populated * after a read transaction. *

Get last available byte read from Slave 4. * This register stores the data read from Slave 4. This field is populated * after a read transaction. *

Get Slave 0 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 0 to be writt

Get Slave 0 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 0 to be writt

Get Slave 0 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 0. This triggers an in

Get Slave 0 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 0. This triggers an in

Get Slave 1 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 1 to be writt

Get Slave 1 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 1 to be writt

Get Slave 1 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 1. This triggers an in

Get Slave 1 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 1. This triggers an in

Get Slave 2 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 2 to be writt

Get Slave 2 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 2 to be writt

Get Slave 2 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 2. This triggers an in

Get Slave 2 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 2. This triggers an in

Get Slave 3 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 3 to be writt

Get Slave 3 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 3 to be writt

Get Slave 3 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 3. This triggers an in

Get Slave 3 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 3. This triggers an in

Get the I2C address of Slave 4. * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read * operation, and if it is cleared, th

Get the I2C address of Slave 4. * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read * operation, and if it is cleared, th

Get the enabled value for the Slave 4. * When set to 1, this bit enables Slave 4 for data transfer operations. When * cleared to 0, this bit disable

Get the enabled value for the Slave 4. * When set to 1, this bit enables Slave 4 for data transfer operations. When * cleared to 0, this bit disable

Get the enabled value for Slave 4 transaction interrupts. * When set to 1, this bit enables the generation of an interrupt signal upon * completion

Get the enabled value for Slave 4 transaction interrupts. * When set to 1, this bit enables the generation of an interrupt signal upon * completion

Get Slave 4 transaction done status. * Automatically sets to 1 when a Slave 4 transaction has completed. This * triggers an interrupt if the I2C_MST

Get Slave 4 transaction done status. * Automatically sets to 1 when a Slave 4 transaction has completed. This * triggers an interrupt if the I2C_MST

Get Slave 4 master delay value. * This configures the reduced access rate of I2C slaves relative to the Sample * Rate. When a slave's access rate is

Get Slave 4 master delay value. * This configures the reduced access rate of I2C slaves relative to the Sample * Rate. When a slave's access rate is

Get Slave 4 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 4. This triggers an in

Get Slave 4 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 4. This triggers an in

Get the active internal register for the Slave 4. * Read/write operations for this slave will be done to whatever internal * register address is sto

Get the active internal register for the Slave 4. * Read/write operations for this slave will be done to whatever internal * register address is sto

Get write mode for Slave 4. * When set to 1, the transaction will read or write data only. When cleared to * 0, the transaction will write a registe

Get write mode for Slave 4. * When set to 1, the transaction will read or write data only. When cleared to * 0, the transaction will write a registe

Get the I2C address of the specified slave (0-3). * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read * operation, and if

Get the I2C address of the specified slave (0-3). * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read * operation, and if

Get number of bytes to read for the specified slave (0-3). * Specifies the number of bytes transferred to and from Slave 0. Clearing this * bit to 0

Get number of bytes to read for the specified slave (0-3). * Specifies the number of bytes transferred to and from Slave 0. Clearing this * bit to 0

Get slave delay enabled status. * When a particular slave delay is enabled, the rate of access for the that * slave device is reduced. When a slave'

Get slave delay enabled status. * When a particular slave delay is enabled, the rate of access for the that * slave device is reduced. When a slave'

Get the enabled value for the specified slave (0-3). * When set to 1, this bit enables Slave 0 for data transfer operations. When * cleared to 0, th

Get the enabled value for the specified slave (0-3). * When set to 1, this bit enables Slave 0 for data transfer operations. When * cleared to 0, th

Get slave read/write transition enabled value. * The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave * read to the next slav

Get slave read/write transition enabled value. * The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave * read to the next slav

Get the active internal register for the specified slave (0-3). * Read/write operations for this slave will be done to whatever internal * register

Get the active internal register for the specified slave (0-3). * Read/write operations for this slave will be done to whatever internal * register

Get word pair byte-swapping enabled for the specified slave (0-3). * When set to 1, this bit enables byte swapping. When byte swapping is enabled, *

Get word pair byte-swapping enabled for the specified slave (0-3). * When set to 1, this bit enables byte swapping. When byte swapping is enabled, *

Get word pair grouping order offset for the specified slave (0-3). * This sets specifies the grouping order of word pairs received from registers. *

Get word pair grouping order offset for the specified slave (0-3). * This sets specifies the grouping order of word pairs received from registers. *

Get write mode for the specified slave (0-3). * When set to 1, the transaction will read or write data only. When cleared to * 0, the transaction wi

Get write mode for the specified slave (0-3). * When set to 1, the transaction will read or write data only. When cleared to * 0, the transaction wi

Get sleep mode status. * Setting the SLEEP bit in the register puts the device into very low power * sleep mode. In this mode, only the serial inter