MCPcopy Create free account

hub / github.com/ben-j-c/verilog2factorio / functions

Functions739 in github.com/ben-j-c/verilog2factorio

↓ 164 callersMethodadd_wire_red
It has the same behaviour as a wire in game. fanin/fanout MUST be anything other than another wire. Returns the id for the wire you created.
src/logical_design.rs:3582
↓ 134 callersFunctionnew
()
src/ndarr.rs:70
↓ 123 callersMethodstep
(&mut self, steps: u32)
src/sim.rs:459
↓ 121 callersFunctionnew
()
src/tests/logical_design_tests.rs:206
↓ 116 callersMethodbuild_from
(&mut self, logical: &LogicalDesign)
src/phy/design.rs:243
↓ 101 callersMethodset_ith_output_count
(&mut self, id: NodeId, i: usize, count: i32)
src/logical_design.rs:3522
↓ 100 callersMethodassignment
(&self, id: Num)
src/phy/placement.rs:883
↓ 96 callersFunctionnew
()
src/tests/sim_tests.rs:72
↓ 86 callersMethodconnect_red
Connect the red wires from `out_node` to `in_node`. e.g., if `out_node` is an arithmetic combinator and `in_node` is a red wire, then the red terminal
src/logical_design.rs:702
↓ 86 callersMethodset_description_node
(&mut self, id: NodeId, desc: S)
src/logical_design.rs:4339
↓ 73 callersMethodadd_constant
Add a new constant combinator to this design, with the specified output signals and their matching constant values. For example, (vec![Signal::Id(0)],
src/logical_design.rs:3495
↓ 70 callersMethodis_empty
(&self)
src/checked_design.rs:333
↓ 69 callersMethodget
(&self)
src/lua.rs:130
↓ 65 callersMethodis_some
(&self)
src/logical_design.rs:192
↓ 59 callersFunctionnew
()
src/phy/design.rs:3118
↓ 57 callersMethodadd_decider
Add an empty Decider Combinator to this design. You can then configure its input rows and outputs using [`add_decider_comb_input`] and [`add_decider_c
src/logical_design.rs:3321
↓ 53 callersFunctionlookup_sig
(mapped_name: &str)
src/signal_lookup_table.rs:390
↓ 52 callersMethodadd_wire_red_simple
It has the same behaviour as a wire in game. fanin/fanout MUST be anything other than another wire. Returns the id for the wire you created.
src/logical_design.rs:3736
↓ 52 callersMethodget_node
(&self, id: NodeId)
src/logical_design.rs:3787
↓ 51 callersMethodcontains
(&self, _index: &SpaceIndex)
src/phy/design.rs:3014
↓ 49 callersMethodadd_nop
Add a combinator fitting the pattern that I call "no-operation". Converts the input signal to an output signal using an arithmetic combinator. Return
src/logical_design.rs:866
↓ 48 callersMethodadd_decider_input
Add an input row to the specified decider combinator. Each row is given as a (Signal, DeciderOperator, Signal), and it is combined with previous rows
src/logical_design.rs:3339
↓ 41 callersMethodor
(&self, term: &DeciderSop)
src/logical_design/decider_parser.rs:145
↓ 38 callersMethodadd_wire_green
It has the same behaviour as a wire in game. fanin/fanout MUST be anything other than another wire. Returns the id for the wire you created.
src/logical_design.rs:3663
↓ 37 callersMethoddims
(&self)
src/ndarr.rs:55
↓ 37 callersFunctionhash_map
()
src/util.rs:15
↓ 35 callersMethodunwrap_bin_str
(&self)
src/mapped_design.rs:501
↓ 34 callersMethodadd_arithmetic
Add a arithmetic combinator to this design. The expression matches what you see in game. Returns the id for that new combinator.
src/logical_design.rs:752
↓ 34 callersMethodcmp
(&self, other: &Self)
src/phy/route.rs:29
↓ 33 callersMethodadd_decider_out_input_count
Add an output signal to the specified decider combinator.
src/logical_design.rs:3447
↓ 32 callersMethodextend
( &mut self, other: PhysicalDesign, logical_design_offset: usize, pos: (usize, usize), )
src/phy/design.rs:2783
↓ 32 callersFunctionhash_set
()
src/util.rs:11
↓ 31 callersMethodadd_decider_out_constant
Add an output signal to the specified decider combinator.
src/logical_design.rs:3418
↓ 30 callersMethoddensity
(&self, assignment: (Num, Num))
src/phy/placement.rs:879
↓ 30 callersMethodresolve_string
(&self)
src/serializable_design.rs:578
↓ 29 callersMethodadd_arc
(&mut self, send: NodeId, recv: NodeId, delay: Delay)
src/timing_engine.rs:32
↓ 28 callersMethodadd_lamp
Add a lamp entity to this design, configured to light up based on the provided condition tuple (Signal, DeciderOperator, Signal). When the condition i
src/logical_design.rs:3537
↓ 27 callersMethodnew_node
(&mut self, mapped_id: &str, node_type: NodeType)
src/checked_design.rs:380
↓ 26 callersMethodenergy
(&self, id: Num, connections_per_node: &Vec<Vec<usize>>)
src/phy/placement.rs:935
↓ 25 callersMethodset_sink_delay
(&mut self, node: NodeId, delay: Delay)
src/timing_engine.rs:40
↓ 24 callersMethodconnect
(&mut self, send: NodeId, recv: NodeId)
src/checked_design.rs:416
↓ 22 callersMethodadd_wire_green_simple
It has the same behaviour as a wire in game. fanin/fanout MUST be anything other than another wire. Returns the id for the wire you created.
src/logical_design.rs:3751
↓ 22 callersMethodclear
(&mut self)
src/sim.rs:1661
↓ 22 callersFunctionindex_of
(strings: &[&str], target: &str)
src/util.rs:68
↓ 22 callersMethodplace
(&mut self, id: Num, assignment: (Num, Num))
src/phy/placement.rs:771
↓ 21 callersMethodfrom_bin_str
(&self)
src/mapped_design.rs:489
↓ 21 callersMethodprobe_input
(&self, id: NodeId, net: (bool, bool))
src/sim.rs:360
↓ 20 callersMethodconnect_green
See [`connect_red`] but replace red with green.
src/logical_design.rs:721
↓ 20 callersMethodmov
(&mut self, id: Num, assignment: (Num, Num))
src/phy/placement.rs:780
↓ 18 callersMethodid_in_range_exclude_a1
( &self, assignment1: (Num, Num), assignment2: (isize, isize), )
src/phy/placement.rs:891
↓ 18 callersMethodnum_cells
(&self)
src/phy/placement.rs:887
↓ 17 callersMethodnode_type
(&self, nodeid: NodeId)
src/checked_design.rs:372
↓ 17 callersMethodprobe_red_out
(&self, id: NodeId)
src/sim.rs:336
↓ 17 callersMethodswap
(&mut self, id_a: Num, id_b: Num)
src/phy/placement.rs:785
↓ 16 callersMethodadd_constant_simple
Add a new constant combinator to this design, with the specified output signals and their matching constant values. For example, (vec![Signal::Id(0)],
src/logical_design.rs:3512
↓ 16 callersMethodadd_node
Add a node with the specific [`NodeFunction`] and the specific output [`Signal`]. Generally a low level API.
src/logical_design.rs:684
↓ 16 callersMethodis_none
(&self)
src/logical_design.rs:196
↓ 16 callersMethodsave_svg
(&self, ld: &LogicalDesign, filename: P)
src/phy/design.rs:1604
↓ 15 callersMethodadd_trace
(&mut self, node: NodeId)
src/sim.rs:321
↓ 15 callersMethodis_pole
(&self, id: PhyId)
src/phy/design.rs:2890
↓ 15 callersMethoditer_fanout
Iterate the fanout of a specific colour.
src/logical_design.rs:475
↓ 14 callersMethodadd_arithmetic_with_net
( &mut self, expr: (Signal, ArithmeticOperator, Signal), output: Signal, left_network: (bool, bool),
src/logical_design.rs:769
↓ 14 callersMethodwire_hop_spec
(&self)
src/phy/design.rs:3054
↓ 13 callersMethoddisconnect
(&mut self, first: NodeId, second: NodeId, colour: WireColour)
src/logical_design.rs:4472
↓ 13 callersMethodget_seen_signal_count
(&self, node: NodeId, id: i32, colours: (bool, bool))
src/sim.rs:540
↓ 13 callersMethoditer_fanin
Iterate the fanin of a specific colour.
src/logical_design.rs:467
↓ 13 callersFunctionn_ids
()
src/signal_lookup_table.rs:415
↓ 12 callersMethodbucket_idx
(&self, (x, y): (f32, f32))
src/phy/placement2.rs:506
↓ 12 callersMethodfor_all
(&self, mut func: F)
src/logical_design.rs:3778
↓ 12 callersMethodsave
(&self, filename: P)
src/svg.rs:410
↓ 12 callersMethodset_decider_expr
(&mut self, id: NodeId, expr: S)
src/logical_design.rs:3367
↓ 11 callersMethodadd_rect
( &mut self, x: i32, y: i32, w: i32, h: i32, colour: (u8, u8, u8), label: Option<String>, hove
src/svg.rs:133
↓ 11 callersMethodprint
(&self)
src/sim.rs:916
↓ 11 callersMethodresolve_signal_id
(&self)
src/serializable_design.rs:545
↓ 11 callersMethodset_constant_enabled
(&mut self, nodeid: NodeId, enabled_state: bool)
src/logical_design.rs:3839
↓ 10 callersMethodconnect
(&mut self, lhs: &Terminal, rhs: &TerminalSide)
src/lua/physical_ensemble.rs:37
↓ 10 callersFunctionexponential_distr_sample
(u: f64, median: f64, num_cells: usize)
src/phy/placement.rs:718
↓ 10 callersMethodid_at
( &self, assignment: (Num, Num), )
src/phy/placement.rs:928
↓ 10 callersMethodis_connection
(&self)
src/mapped_design.rs:80
↓ 10 callersMethodset_decider_inputs
(&mut self, id: NodeId, expr: &DeciderSop)
src/logical_design.rs:3381
↓ 10 callersMethodset_source_delay
(&mut self, node: NodeId, delay: Delay)
src/timing_engine.rs:44
↓ 9 callersMethodcompute_cost
( &self, connections: &Vec<(usize, usize)>, max_density: i32, )
src/phy/placement.rs:964
↓ 9 callersMethoditer_fanin_both
Iterate the fanin of both colours.
src/logical_design.rs:506
↓ 9 callersMethodkeys
(&self)
src/sim.rs:1669
↓ 9 callersMethodtry_into
(self)
src/logical_design.rs:147
↓ 9 callersMethodwire_hop_type
(&self)
src/phy/design.rs:3067
↓ 8 callersMethodcenter
(&self)
src/phy/placement2.rs:54
↓ 8 callersMethodid
(&self)
src/mapped_design.rs:92
↓ 8 callersMethodindex_good
(&self, idx: (usize, usize))
src/ndarr.rs:51
↓ 8 callersMethodreplace_placeholder
(&self, repl: Signal, ident: usize)
src/logical_design/decider_parser.rs:168
↓ 8 callersMethodripup
(&mut self, id: Num)
src/phy/placement.rs:755
↓ 8 callersMethodripup_loc
( &mut self, assignment: (Num, Num), )
src/phy/placement.rs:761
↓ 7 callersMethodadd_dffe
( &mut self, input: Signal, clk: Signal, en: Signal, output: Signal, )
src/logical_design.rs:1362
↓ 7 callersMethodcannon
(&self)
src/logical_design/decider_parser.rs:213
↓ 7 callersMethodget_lid
(&self)
src/gui.rs:463
↓ 7 callersMethodis_wire
(&self, id: NodeId)
src/logical_design.rs:3809
↓ 7 callersMethoditer_fanout_both
Iterate the fanout of both colours.
src/logical_design.rs:498
↓ 7 callersFunctionlookup_sig_opt
(mapped_name: &S)
src/signal_lookup_table.rs:397
↓ 7 callersFunctionlua_flow
(args: Args)
src/lib.rs:166
↓ 7 callersFunctionnew
()
src/phy/placement.rs:2023
next →1–100 of 739, ranked by callers