Function FGmac_InitializeHw

bsp/ft2004/libraries/bsp/ft_gmac/ft_gmac_hw.c:279–450

}

s32 FGmac_InitializeHw(FGmac_Config_t *Config)
{
    u32 Wait_Counter = 0;
    u32 RegValue;
    s32 ret = FST_SUCCESS;

    /*Gmac Software reset   */
    Ft_out32(Config->BaseAddress + DMA_BUS_MODE_OFFSET, DMA_BUS_SWR);

    while ((Ft_in32(Config->BaseAddress + DMA_BUS_MODE_OFFSET) & DMA_BUS_SWR) == DMA_BUS_SWR)
    {
        if (++Wait_Counter > 30)
        {
            GMAC_HW_DEBUG_E("DMA_BUS_MODE_OFFSET wait is too long ,Addr %x \r\n", Config->BaseAddress);
            return FST_ERROR_COUNT_MAX;
        }
        Ft_GenericTimer_UsDelay(PHY_CONFIG_DELAY_US);
    }
    Wait_Counter = 0;
    Ft_out32(Config->BaseAddress + DMA_BUS_MODE_OFFSET, DMA_BUS_INIT);

    Ft_out32(Config->BaseAddress + DMA_OP_OFFSET, Ft_in32(Config->BaseAddress + DMA_OP_OFFSET) | DMA_OP_FTF);

    while ((Ft_in32(Config->BaseAddress + DMA_OP_OFFSET) & DMA_OP_FTF) == DMA_OP_FTF)
    {
        if (++Wait_Counter > 30)
        {
            GMAC_HW_DEBUG_E("DMA_OP_OFFSET wait is too long \r\n");
            return FST_ERROR_COUNT_MAX;
        }
        Ft_GenericTimer_UsDelay(PHY_CONFIG_DELAY_US);
    }

    Wait_Counter = 0;

    /* GMAC Init */
    Ft_out32(Config->BaseAddress + GMAC_CONTROL_OFFSET, GMAC_CONTROL_INIT);
    /* disable flow control */
    Ft_out32(Config->BaseAddress + GMAC_FLOW_CTRL_OFFSET, 0);

    Ft_out32(Config->BaseAddress + DMA_STATUS_OFFSET, DMA_STATUS_INIT);

    Ft_out32(Config->BaseAddress + DMA_INTR_ENA_OFFSET, 0);

    /* get Phy addr */
    Ft_assertNonvoid(FGmac_PhyAddrGet(Config) == FST_SUCCESS);

    /*-------------------------------- MAC Initialization ----------------------*/
    /*-------------------- PHY initialization and configuration ----------------*/
    /* Put the PHY in reset mode */
    if (Gmac_WritePHYRegister(Config, PHY_BCR_OFFSET, PHY_RESET) != FST_SUCCESS)
    {
        GMAC_HW_DEBUG_E("PHY_BCR_OFFSET is error \r\n");
        return FST_FAILURE;
    }

    do
    {