Get accelerometer power-on delay. * The accelerometer data path provides samples to the sensor registers, Motion * detection, Zero Motion detection,

Get the auxiliary I2C supply voltage level. * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to * 0, the auxiliary I2C b

Get reference clock output enabled status. * When this bit is equal to 1, a reference clock output is provided at the * CLKOUT pin. When this bit is

Get clock source setting. * @return Current clock source setting * @see MPU6050_RA_PWR_MGMT_1 * @see MPU6050_PWR1_CLKSEL_BIT * @see MPU6050_PWR1_C

Get the high-pass filter configuration. * The DHPF is a filter module in the path leading to motion detectors (Free * Fall, Motion threshold, and Ze

Get digital low-pass filter configuration. * The DLPF_CFG parameter sets the digital low pass filter configuration. It * also determines the interna

Get Device ID. * This register is used to verify the identity of the device (0b110100, 0x34). * @return Device ID (6 bits only! should be 0x34) * @

Get external FSYNC configuration. * Configures the external Frame Synchronization (FSYNC) pin sampling. An * external signal connected to the FSYNC

Read single byte from external sensor data register. * These registers store data read from external sensors by the Slave 0, 1, 2, * and 3 on the au

Read double word (4 bytes) from external sensor data registers. * @param position Starting position (0-20) * @return Double word read from registers

Read word (2 bytes) from external sensor data registers. * @param position Starting position (0-21) * @return Word read from register * @see getExt

Get external data shadow delay enabled status. * This register is used to specify the timing of external sensor data * shadowing. When DELAY_ES_SHAD

Get byte from FIFO buffer. * This register is used to read and write data from the FIFO buffer. Data is * written to the FIFO in order of register n

Get current FIFO buffer size. * This value indicates the number of bytes stored in the FIFO buffer. This * number is in turn the number of bytes tha

Get FIFO enabled status. * When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer * cannot be written to or read from while disable

Get timeout to get a packet from FIFO buffer. * @return Current timeout to get a packet from FIFO buffer * @see MPU6050_FIFO_DEFAULT_TIMEOUT */

Get FSYNC pin interrupt enabled setting. * Will be set 0 for disabled, 1 for enabled. * @return Current interrupt enabled setting * @see MPU6050_RA

Get FSYNC interrupt logic level mode. * @return Current FSYNC interrupt mode (0=active-high, 1=active-low) * @see getFSyncInterruptMode() * @see MP

Get Free Fall detection counter decrement configuration. * Detection is registered by the Free Fall detection module after accelerometer * measureme

Get free-fall event duration threshold. * This register configures the duration counter threshold for Free Fall event * detection. The duration coun

Get free-fall event acceleration threshold. * This register configures the detection threshold for Free Fall event * detection. The unit of FF_THR i

Get full-scale accelerometer range. * The FS_SEL parameter allows setting the full-scale range of the accelerometer * sensors, as described in the t

Get full-scale gyroscope range. * The FS_SEL parameter allows setting the full-scale range of the gyro sensors, * as described in the table below.

Get self-test factory trim value for gyro X axis. * @return factory trim value * @see MPU6050_RA_SELF_TEST_X */

Get self-test factory trim value for gyro Y axis. * @return factory trim value * @see MPU6050_RA_SELF_TEST_Y */

Get self-test factory trim value for gyro Z axis. * @return factory trim value * @see MPU6050_RA_SELF_TEST_Z */

Get I2C bypass enabled status. * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to * 0, the host application processor wi

Get I2C Master Mode enabled status. * When this mode is enabled, the MPU-60X0 acts as the I2C Master to the * external sensor slave devices on the a

Get Data Ready interrupt enabled setting. * This event occurs each time a write operation to all of the sensor registers * has been completed. Will

Get Data Ready interrupt status. * This bit automatically sets to 1 when a Data Ready interrupt has been * generated. The bit clears to 0 after the

Get full interrupt enabled status. * Full register byte for all interrupts, for quick reading. Each bit will be * set 0 for disabled, 1 for enabled.

Get FIFO Buffer Overflow interrupt enabled status. * Will be set 0 for disabled, 1 for enabled. * @return Current interrupt enabled status * @see M

Get FIFO Buffer Overflow interrupt status. * This bit automatically sets to 1 when a Free Fall interrupt has been * generated. The bit clears to 0 a

Get Free Fall interrupt enabled status. * Will be set 0 for disabled, 1 for enabled. * @return Current interrupt enabled status * @see MPU6050_RA_I

Get Free Fall interrupt status. * This bit automatically sets to 1 when a Free Fall interrupt has been * generated. The bit clears to 0 after the re

Get I2C Master interrupt enabled status. * This enables any of the I2C Master interrupt sources to generate an * interrupt. Will be set 0 for disabl

Get I2C Master interrupt status. * This bit automatically sets to 1 when an I2C Master interrupt has been * generated. For a list of I2C Master inte

Get Motion Detection interrupt enabled status. * Will be set 0 for disabled, 1 for enabled. * @return Current interrupt enabled status * @see MPU60

Get Motion Detection interrupt status. * This bit automatically sets to 1 when a Motion Detection interrupt has been * generated. The bit clears to

Get full set of interrupt status bits. * These bits clear to 0 after the register has been read. Very useful * for getting multiple INT statuses, si

Get Zero Motion Detection interrupt enabled status. * Will be set 0 for disabled, 1 for enabled. * @return Current interrupt enabled status * @see

Get Zero Motion Detection interrupt status. * This bit automatically sets to 1 when a Zero Motion Detection interrupt has * been generated. The bit

Get interrupt drive mode. * Will be set 0 for push-pull, 1 for open-drain. * @return Current interrupt drive mode (0=push-pull, 1=open-drain) * @se

Get interrupt latch mode. * Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared. * @return Current latch mode (0=50us-pulse, 1=latch-until-i

Get interrupt latch clear mode. * Will be set 0 for status-read-only, 1 for any-register-read. * @return Current latch clear mode (0=status-read-onl

Get interrupt logic level mode. * Will be set 0 for active-high, 1 for active-low. * @return Current interrupt mode (0=active-high, 1=active-low) *

Get master arbitration lost status. * This bit automatically sets to 1 when the I2C Master has lost arbitration of * the auxiliary I2C bus (an error

Get I2C master clock speed. * I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the * MPU-60X0 internal 8MHz clock. It sets the I2

Get raw 6-axis motion sensor readings (accel/gyro). * Retrieves all currently available motion sensor values. * @param ax 16-bit signed integer cont

Get raw 9-axis motion sensor readings (accel/gyro/compass). * FUNCTION NOT FULLY IMPLEMENTED YET. * @param ax 16-bit signed integer container for ac

Get Motion detection counter decrement configuration. * Detection is registered by the Motion detection module after accelerometer * measurements me

Get motion detection event duration threshold. * This register configures the duration counter threshold for Motion interrupt * generation. The dura

Get motion detection event acceleration threshold. * This register configures the detection threshold for Motion interrupt * generation. The unit of

Get full motion detection status register content (all bits). * @return Motion detection status byte * @see MPU6050_RA_MOT_DETECT_STATUS */

Get multi-master enabled value. * Multi-master capability allows multiple I2C masters to operate on the same * bus. In circuits where multi-master c

Get FSYNC interrupt status. * This bit reflects the status of the FSYNC interrupt from an external device * into the MPU-60X0. This is used as a way

Get gyroscope output rate divider. * The sensor register output, FIFO output, DMP sampling, Motion detection, Zero * Motion detection, and Free Fall

Get 3-axis gyroscope readings. * These gyroscope measurement registers, along with the accelerometer * measurement registers, temperature measuremen

Get X-axis gyroscope reading. * @return X-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU6050_RA_GYRO_XOUT

Get Y-axis gyroscope reading. * @return Y-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU6050_RA_GYRO_YOUT

Get Z-axis gyroscope reading. * @return Z-axis rotation measurement in 16-bit 2's complement format * @see getMotion6() * @see MPU6050_RA_GYRO_ZOUT

Get last available byte read from Slave 4. * This register stores the data read from Slave 4. This field is populated * after a read transaction. *

Get Slave 0 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 0 to be writt

Get Slave 0 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 0. This triggers an in

Get Slave 1 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 1 to be writt

Get Slave 1 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 1. This triggers an in

Get Slave 2 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 2 to be writt

Get Slave 2 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 2. This triggers an in

Get Slave 3 FIFO enabled value. * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) * associated with Slave 3 to be writt

Get Slave 3 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 3. This triggers an in

Get the I2C address of Slave 4. * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read * operation, and if it is cleared, th

Get the enabled value for the Slave 4. * When set to 1, this bit enables Slave 4 for data transfer operations. When * cleared to 0, this bit disable

Get the enabled value for Slave 4 transaction interrupts. * When set to 1, this bit enables the generation of an interrupt signal upon * completion

Get Slave 4 transaction done status. * Automatically sets to 1 when a Slave 4 transaction has completed. This * triggers an interrupt if the I2C_MST

Get Slave 4 master delay value. * This configures the reduced access rate of I2C slaves relative to the Sample * Rate. When a slave's access rate is

Get Slave 4 NACK status. * This bit automatically sets to 1 when the I2C Master receives a NACK in a * transaction with Slave 4. This triggers an in

Get the active internal register for the Slave 4. * Read/write operations for this slave will be done to whatever internal * register address is sto