takes the lower two 32-bit values from a and swaps them and places in high end of result takes the higher two 32 bit values from b and swaps them and

keeps the low 64 bits of b in the low and puts the high 64 bits of a in the high

EQUAL_ORDERED aggregation for 16x8 (word mode). * Same algorithm as 8x16 but for 16-bit elements with 8 lanes. * * Vectorization approach: transpos

EQUAL_ORDERED aggregation for 8x16 (byte mode). * The algorithm checks where string a appears in string b. * For result bit i: AND together mtx[i][0

Macro: Get the flush zero bits from the MXCSR control and status register. The flush zero may contain any of the following flags: _MM_FLUSH_ZERO_ON or

Macro: Set the flush zero bits of the MXCSR control and status register to the value in unsigned 32-bit integer a. The flush zero may contain any of t

emulate vaddvq u8 variant */

Compute overall complexity score (0-100).

Compute hash of function body for cache key.

Return human-readable confidence level.

Count scalar operations in function body (legacy wrapper). For detailed analysis, use analyze_complexity() instead. Returns the total co

Safe helper to load double[2] as float32x4_t without strict aliasing * violation. Used in ARMv7 fallback paths where float64x2_t is not natively * s

Binary comparison for floats (handles NaN, signed zero) */

Helper to extract sign bit from double */

Return (hits, misses) statistics.

Check if a double is a quiet NaN */

Check if a float is a signaling NaN (MSB of mantissa = 0, other mantissa * bits != 0) */

Compute overall confidence score (0.0-1.0).

Rotates right (circular right shift) value by "amount" positions

Store result in cache. Args: func_name: Function name body_hash: Hash of function body result: Analysis r

Dummy function to match the case label in runSingleTest.

SSSE3 */

SSE2 */

SSE */

SSE3 */

AES */

r0 := ~a0 & b0 r1 := ~a1 & b1 r2 := ~a2 & b2 r3 := ~a3 & b3

SSE4.1 */