Strategy 8: ABS and Sign Operations * * Tests absolute value and sign manipulation intrinsics. */

Strategy 23: Advanced Integer Operations * * Tests SSSE3/SSE4.1 advanced integer intrinsics: * - _mm_minpos_epu16: horizontal minimum with position

Strategy 17: AES Encryption Operations * * Tests AES-NI intrinsics for encryption/decryption. * These are critical for cryptographic applications.

Strategy 2: Alignment Testing * * Tests memory load/store intrinsics with various alignments: * - Properly aligned (16-byte boundary) * - Misalign

Strategy 18: CLMUL Carry-less Multiplication * * Tests PCLMULQDQ for carry-less (polynomial) multiplication. * Used in GCM mode, CRC calculations,

Strategy 4: Common SSE Instruction Robustness * * Tests frequently-used intrinsics with various input patterns: * - Comparison operations * - Logi

Strategy 14: Conversion Edge Cases * * Tests type conversions with boundary values where x86/ARM may differ. */

Strategy 7: CRC32 Operations * * Tests CRC32 intrinsics with various input patterns. */

Strategy 12: Dot Product Operations * * Tests _mm_dp_ps/_mm_dp_pd with various mask combinations. * The mask controls which elements are multiplied

Strategy 13: Double Precision Arithmetic * * Expanded coverage for __m128d operations. */

Strategy 6: Extract/Insert Operations * * Tests extract and insert intrinsics with boundary indices. */

Strategy 5: Floating-Point Edge Cases * * Tests float/double intrinsics with special values: * - NaN, Inf, -Inf * - Denormals * - Zero (positive

Strategy 19: Fuzz-Controlled Parameters * * Uses fuzz input to control operation parameters for better coverage. */

Strategy 3: Integer Overflow Testing * * Tests arithmetic intrinsics with values designed to trigger: * - Signed overflow (INT_MAX + 1, INT_MIN - 1

Strategy 22: Masked Move Operations * * Tests _mm_maskmoveu_si128 which selectively stores bytes based on mask. * High-risk operation for memory sa

Strategy 10: NaN Operand Order Testing * * x86 and ARM handle min/max with NaN differently based on operand order. * This tests SSE2NEON_PRECISE_MI

Strategy 11: Ordered vs Unordered Comparisons * * Tests comieq/ucomieq differences in NaN handling and flag setting. */

Strategy 21: SSE4.1 Rounding Operations * * Tests explicit rounding control intrinsics with all rounding modes: * - _MM_FROUND_TO_NEAREST_INT (roun

Strategy 9: Scalar Floating-Point Operations * * Tests scalar operations that must preserve upper lanes. * Common bug: Overwriting upper 3 lanes in

Strategy 24: Scalar Upper Lane Preservation * * UB-Invariant check: Scalar operations (_mm_add_ss, etc.) must preserve * upper lanes regardless of

Strategy 1: Shuffle Index Testing * * Tests shuffle intrinsics with various index patterns including: * - Valid indices (0-15 for epi8, 0-3 for ps/

Strategy 15: SSE3 Additional Operations * * Tests SSE3 intrinsics not covered elsewhere. */

Strategy 16: SSE4.2 String Comparison Operations * * Tests PCMPISTRI/PCMPISTRM/PCMPESTRI/PCMPESTRM string comparison intrinsics. * These are common

Strategy 20: Streaming Store Operations * * Tests non-temporal (streaming) store intrinsics. * These bypass the cache and are critical for memory s

Strategy 25: System Intrinsics * * Tests memory barrier, prefetch, and control register intrinsics. * These are critical for cache behavior and syn

Traverse AST and yield all nodes.

Validate analysis results against reference data. Returns list of ValidationResult for each intrinsic with reference data.

Verify all lanes are negative infinity or NaN (for rsqrt compatibility) */

Verify all lanes are positive infinity or NaN (for rsqrt compatibility) */

Verify against golden data */

Test FIPS 197 Appendix B: AES-128 encryption */

_mm_empty is a no-op on arm

gets the lower 64 bits of a, swaps the 0 and 1 elements and places it in the upper 64 bits gets the lower 64 bits of a, swaps the 0 and 1 elements, an

rotates the least significant 32 bits into the most significant 32 bits, and shifts the rest down

gets the lower 64 bits of a, swaps the 0 and 1 elements, and places it in the lower 64 bits gets the lower 64 bits of a, and places it in the upper 64

gets the lower 64 bits of a, and places it in the upper 64 bits gets the lower 64 bits of a and places it in the lower 64 bits

Takes the upper 64 bits of a and places it in the low end of the result Takes the lower 64 bits of a and places it into the high end of the result.

rotates the most significant 32 bits into the least significant 32 bits, and shifts the rest up

takes the lower two 32-bit values from a and swaps them and places in low end of result takes the higher two 32 bit values from a and swaps them and p

Takes the upper 64 bits of a and places it in the low end of the result Takes the lower 64 bits of b and places it into the high end of the result.