Code
Hub
Workspaces
Following
Trending
Connect
MCP
copy
Create free account
hub
/
github.com/d0iasm/rvemu-for-book
/ types & classes
Types & classes
88 in github.com/d0iasm/rvemu-for-book
⨍
Functions
403
◇
Types & classes
88
Enum
AccessType
module/src/mmu.rs:10
Enum
AccessType
step10/src/cpu.rs:72
Class
Bus
The system bus.
02/src/bus.rs:10
Class
Bus
The system bus.
module/src/bus.rs:43
Class
Bus
The system bus.
step09/src/bus.rs:43
Class
Bus
The system bus.
step08/src/bus.rs:37
Class
Bus
The system bus.
step10/src/bus.rs:43
Class
Bus
The system bus.
step05/src/bus.rs:16
Class
Bus
The system bus.
step07/src/bus.rs:37
Class
Bus
The system bus.
03/src/bus.rs:15
Class
Bus
The system bus.
step04/src/bus.rs:15
Class
Bus
The system bus.
step06/src/bus.rs:31
Class
Clint
The core-local interruptor (CLINT).
module/src/clint.rs:16
Class
Clint
The core-local interruptor (CLINT).
step09/src/clint.rs:16
Class
Clint
The core-local interruptor (CLINT).
step08/src/clint.rs:16
Class
Clint
The core-local interruptor (CLINT).
step10/src/clint.rs:16
Class
Clint
The core-local interruptor (CLINT).
step07/src/clint.rs:16
Class
Clint
The core-local interruptor (CLINT).
step06/src/clint.rs:16
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
02/src/cpu.rs:8
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
module/src/cpu.rs:68
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
step09/src/cpu.rs:76
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
step08/src/cpu.rs:75
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
step10/src/cpu.rs:83
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
step05/src/cpu.rs:65
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
step07/src/cpu.rs:65
Class
Cpu
The CPU to contain registers, a program coutner, and DRAM.
01/src/main.rs:10
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
03/src/cpu.rs:56
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
step04/src/cpu.rs:64
Class
Cpu
The `Cpu` struct that contains registers, a program coutner, system bus that connects peripheral devices, and control and status registers.
step06/src/cpu.rs:65
Interface
Device
module/src/bus.rs:37
Interface
Device
step09/src/bus.rs:37
Interface
Device
step08/src/bus.rs:31
Interface
Device
step10/src/bus.rs:37
Interface
Device
step05/src/bus.rs:10
Interface
Device
step07/src/bus.rs:31
Interface
Device
03/src/bus.rs:9
Interface
Device
step04/src/bus.rs:9
Interface
Device
step06/src/bus.rs:25
Class
Dram
02/src/dram.rs:10
Class
Dram
module/src/dram.rs:11
Class
Dram
step09/src/dram.rs:11
Class
Dram
step08/src/dram.rs:11
Class
Dram
step10/src/dram.rs:11
Class
Dram
step05/src/dram.rs:11
Class
Dram
step07/src/dram.rs:11
Class
Dram
03/src/dram.rs:10
Class
Dram
step04/src/dram.rs:10
Class
Dram
step06/src/dram.rs:11
Enum
Exception
module/src/trap.rs:10
Enum
Exception
step09/src/trap.rs:10
Enum
Exception
step08/src/trap.rs:10
Enum
Exception
step10/src/trap.rs:10
Enum
Exception
step05/src/trap.rs:10
Enum
Exception
step07/src/trap.rs:10
Enum
Exception
step06/src/trap.rs:10
Enum
Interrupt
module/src/trap.rs:31
Enum
Interrupt
step09/src/trap.rs:31
Enum
Interrupt
step08/src/trap.rs:31
Enum
Interrupt
step10/src/trap.rs:31
Enum
Mode
module/src/cpu.rs:60
Enum
Mode
step09/src/cpu.rs:68
Enum
Mode
step08/src/cpu.rs:67
Enum
Mode
step10/src/cpu.rs:63
Enum
Mode
step05/src/cpu.rs:57
Enum
Mode
step07/src/cpu.rs:57
Enum
Mode
step04/src/cpu.rs:56
Enum
Mode
step06/src/cpu.rs:57
Class
Plic
The platform-level-interrupt controller (PLIC).
module/src/plic.rs:19
Class
Plic
The platform-level-interrupt controller (PLIC).
step09/src/plic.rs:19
Class
Plic
The platform-level-interrupt controller (PLIC).
step08/src/plic.rs:19
Class
Plic
The platform-level-interrupt controller (PLIC).
step10/src/plic.rs:19
Class
Plic
The platform-level-interrupt controller (PLIC).
step07/src/plic.rs:19
Class
Plic
The platform-level-interrupt controller (PLIC).
step06/src/plic.rs:19
Interface
Trap
The transfer of control to a trap handler caused by either an exception or an interrupt.
module/src/trap.rs:45
Interface
Trap
The transfer of control to a trap handler caused by either an exception or an interrupt.
step09/src/trap.rs:45
Interface
Trap
The transfer of control to a trap handler caused by either an exception or an interrupt.
step08/src/trap.rs:45
Interface
Trap
The transfer of control to a trap handler caused by either an exception or an interrupt.
step10/src/trap.rs:45
Interface
Trap
The transfer of control to a trap handler caused by either an exception or an interrupt.
step05/src/trap.rs:29
Interface
Trap
The transfer of control to a trap handler caused by either an exception or an interrupt.
step07/src/trap.rs:29
Interface
Trap
The transfer of control to a trap handler caused by either an exception or an interrupt.
step06/src/trap.rs:29
Class
Uart
module/src/uart.rs:41
Class
Uart
step09/src/uart.rs:41
Class
Uart
step08/src/uart.rs:41
Class
Uart
step10/src/uart.rs:41
Class
Uart
step07/src/uart.rs:38
Class
Virtio
Paravirtualized drivers for IO virtualization.
module/src/virtio.rs:48
Class
Virtio
Paravirtualized drivers for IO virtualization.
step09/src/virtio.rs:48
Class
Virtio
Paravirtualized drivers for IO virtualization.
step10/src/virtio.rs:48