* tpl_remove_timeobj_set removes a consecutive set of time object with * the same date starting with the next_to of the counter given as parameter.

\brief Reverse byte order (32 bit) \details Reverses the byte order in integer value. \param [in] value Value to reverse \return

/ * @brief * Perform a single-bit write operation on a peripheral register * * @details * This function uses Cortex-M bit-banding hardware to

* @brief C custom defined SMLAD for M3 and M0 processors */

* @brief C custom defined SMLADX for M3 and M0 processors */

TODO : Multicore - Get CoreID's ipid */

* @brief C custom defined SMLALD for M3 and M0 processors */

* @brief C custom defined SMLALDX for M3 and M0 processors */

* @brief Writes data in the Data Input register (DIN). * @note After the DIN register has been read once or several times, * the FIFO

/ ! @brief Get height of the display, accounting for the current rotation @returns Height in pixels */ /

* @internal * * */

* @brief Forces or releases Low Speed APB (APB1) peripheral reset. * @param RCC_APB1Periph: specifies the APB1 peripheral to reset. * T

* @brief Returns the last data entered into the output FIFO. * @param None * @retval Last data entered into the output FIFO. */

text functions, top left is (0,0) */

* @brief C custom defined QSUB16 for M3 and M0 processors */

* @brief Clips Q63 to Q31 values. */

* @brief C custom defined SHADD16 for M3 and M0 processors */

Simply a wrapper for uart_write_chars */

/ ! @brief Get width of the display, accounting for the current rotation @returns Width in pixels */ /

find returns true if the target string is found

/ * @brief * Enable/disable oscillator. * * @note * WARNING: When this function is called to disable either cmuOsc_LFXO or * cmuOsc_HFXO th

* \brief Board initialization. * * Good to know: * - At reset, Reset_Handler did the system clock configuration. Core is running at F_CPU MHz. *

* @brief C custom defined SMUAD for M3 and M0 processors */

* @brief Forces or releases High Speed APB (APB2) peripheral reset. * @param RCC_APB2Periph: specifies the APB2 peripheral to reset. *

* @brief C custom defined QSUB for M3 and M0 processors */

* @brief Enables or disables the CRYP peripheral. * @param NewState: new state of the CRYP peripheral. * This parameter can be: ENABLE

exit loop

* @brief Checks whether the specified CRYP flag is set or not. * @param CRYP_FLAG: specifies the CRYP flag to check. * This parameter c

* @brief C custom defined QADD16 for M3 and M0 processors */

* @brief C custom defined SMUSD for M3 and M0 processors */

/ ! @brief Helper to let us know if a coordinate is within the bounds of the button @param x The X coordinate to check @param

* @def WaitActivationOneShotAlarm * * This function wait for alarm one shot alarm expiration * * @param Alarm Alarm id * */

\brief Data Synchronization Barrier This function acts as a special kind of Data Memory Barrier. It completes when all explicit memory acces

* @brief C custom defined SMUADX for M3 and M0 processors */

Copy memory to memory */

* @brief Convert from 2 digit BCD to Binary. * @param Value: BCD value to be converted. * @retval Converted word */

Fill memory block */

Simply a wrapper for uart_write_chars */

* @brief C custom defined QADD for M3 and M0 processors */

/ * @brief * Perform a single-bit read operation on a peripheral register * * @details * This function uses Cortex-M bit-banding hardware to p

\brief Clear Pending Interrupt \details Clears the pending bit of an external interrupt. \param [in] IRQn External interrupt number. Value