* @brief Forces or releases AHB1 peripheral reset. * @param RCC_AHB1Periph: specifies the AHB1 peripheral to reset. * This parameter ca

* The outString is rode by the lauterbach.cmm script at the end of the * function. */

/ * @brief * Convert logarithm of 2 prescaler to division factor. * * @param[in] log2 * Logarithm of 2, as used by fixed prescalers. * * @re

* @brief Waits for a FLASH operation to complete. * @param None * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGR

\brief Enable External Interrupt \details Enables a device-specific interrupt in the NVIC interrupt controller. \param [in] IRQn External

* @brief C custom defined SMUSDX for M3 and M0 processors */

/ * @brief * Get clock frequency for a clock point. * * @param[in] clock * Clock point to fetch frequency for. * * @return * The current

* @brief Returns whether CRYP peripheral is enabled or disabled. * @param none. * @retval Current state of the CRYP peripheral (ENABLE or DISABL

/ * @brief * Get currently selected reference clock used for a clock branch. * * @param[in] clock * Clock branch to fetch selected ref. clock

/ * @brief * Send a command packet to micro SD card. * @param[in] cmd * Command byte. * @param[in] arg * Argument. * @return * Response val

/ * @brief * Do one SPI transfer. * * @param data * Byte to transmit. * * @return * Byte received. ****************************************

\brief Set Interrupt Priority \details Sets the priority of an interrupt. \note The priority cannot be set for every core interrupt. \param

/ * @brief * Wait for ongoing sync of register(s) to low frequency domain to complete. * * @param[in] pcnt * Pointer to PCNT peripheral regist

* @def WaitActivationPeriodicAlarm * * This function wait for alarm periodic alarm expiration * * @param Alarm Alarm id * */

/ * @brief * Perform peripheral register masked clear and value write. * * @details * This function first clears the mask in the peripheral re

/ * @brief * Get the current core clock frequency. * * @details * Calculate and get the current core clock frequency based on the current *

/ * @brief * Set HFLE wait-states and HFCLKLE prescaler. * * @param[in] maxLeFreq * Max LE frequency ****************************************

/ * @brief * Wait for ongoing sync of register(s) to low frequency domain to complete. * * @param[in] mask * Bitmask corresponding to SYNCBUSY

* @brief Configures the AES-CCM and AES-GCM phases * @note This function is used only with AES-CCM or AES-GCM Algorithms * @param CRYP_Phase

------------------------------------------------------------------------

/ * @brief * Write 128 bits of data to a DATAX register in the CRYPTO module. * * @details * Write 128 bits of data to a DATAX register in the

* Return the requests sensor analoge reading. */

* @brief Checks whether the CAN interrupt has occurred or not. * @param CAN_Reg: specifies the CAN interrupt register to check. * @param It_Bit

/ * @brief * Write a 128 bit value into a crypto register. * * @note * This function provide a low-level api for writing to the multi-word *

* @brief Flushes the IN and OUT FIFOs (that is read and write pointers of the * FIFOs are reset) * @note The FIFOs must be flushed onl

* @brief Initializes the CRYP peripheral according to the specified parameters * in the CRYP_InitStruct. * @param CRYP_InitStruct: point

* @brief Initializes the CRYP Keys according to the specified parameters in * the CRYP_KeyInitStruct. * @param CRYP_KeyInitStruct: point

*/

\brief Disable External Interrupt \details Disables a device-specific interrupt in the NVIC interrupt controller. \param [in] IRQn Externa

\brief Disable IRQ Interrupts \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */

/ * @brief * Waiting function. * * @param[in] can * Pointer to CAN peripheral register block. * * @param[in] interface * Indicate which M

/ * @brief * Enable/disable a clock. * * @details * In general, module clocking is disabled after a reset. If a module * clock is disabled,

/ * @brief * Read a 128 bit value from a crypto register. * * @note * This function provide a low-level api for reading one of the multi-word

/ * @brief * Get the current HFCLK frequency. * * @note * This is an EFM32 proprietary function, not part of the CMSIS definition. * * @retu

\brief Instruction Synchronization Barrier Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructio

Enable handling of an interrupt line in the AIC. * * Args: * vector: The peripheral ID of the interrupt line to enable. */

/ * @brief * Get the LFnCLK frequency based on current configuration. * * @param[in] lfClkBranch * Selected LF branch * * @return * The L

/ * @brief * Send request for writing or reading the RAM of Message Object msgNum. * * @param[in] can * Pointer to CAN peripheral register blo

/ * @brief * Convert dividend to logarithmic value. Only works for even * numbers equal to 2^n. * * @param[in] div * Unscaled dividend. *

/ * @brief * Configure various wait states necessary to switch to a certain frequency * and a certain voltage scale. * * @details * This fu

Disable handling of an interrupt line in the AIC. * * Args: * vector: The peripheral ID of the interrupt line to disable. */

Register an interrupt service routine for an interrupt line. * * Note that while this function registers the routine in the AIC, it * does not enab

Start a transaction. */