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Function CMU_ClockDivSet

bsp/efm32/Libraries/emlib/src/em_cmu.c:738–906  ·  view source on GitHub ↗

/ * @brief * Set clock divisor/prescaler. * * @note * If setting a LF clock prescaler, synchronization into the low frequency * domain is required. If the same register is modified before a previous * update has completed, this function will stall until the previous * synchronization has completed. Please refer to CMU_FreezeEnable() for * a suggestion on how to reduce stalling

Source from the content-addressed store, hash-verified

736 * The clock divisor to use (<= cmuClkDiv_512).
737 ******************************************************************************/
738void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div)
739{
740 uint32_t freq;
741 uint32_t divReg;
742
743 /* Get divisor reg id */
744 divReg = (clock >> CMU_DIV_REG_POS) & CMU_DIV_REG_MASK;
745
746 switch (divReg)
747 {
748#if defined (_EFM32_GIANT_FAMILY)
749 case CMU_HFCLKDIV_REG:
750 EFM_ASSERT((div>=cmuClkDiv_1) && (div<=cmuClkDiv_8));
751
752 /* Configure worst case wait states for flash access before setting divisor */
753 CMU_FlashWaitStateMax();
754
755 /* Set divider */
756 CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFCLKDIV_MASK) |
757 ((div-1) << _CMU_CTRL_HFCLKDIV_SHIFT);
758
759 /* Update CMSIS core clock variable */
760 /* (The function will update the global variable) */
761 freq = SystemCoreClockGet();
762
763 /* Optimize flash access wait state setting for current core clk */
764 CMU_FlashWaitStateControl(freq);
765 break;
766#endif
767
768 case CMU_HFPERCLKDIV_REG:
769 EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_512));
770 /* Convert to correct scale */
771 div = CMU_DivToLog2(div);
772 CMU->HFPERCLKDIV = (CMU->HFPERCLKDIV & ~_CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) |
773 (div << _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT);
774 break;
775
776 case CMU_HFCORECLKDIV_REG:
777 EFM_ASSERT(div <= cmuClkDiv_512);
778
779 /* Configure worst case wait states for flash access before setting divisor */
780 CMU_FlashWaitStateMax();
781
782 /* Convert to correct scale */
783 div = CMU_DivToLog2(div);
784
785 CMU->HFCORECLKDIV = (CMU->HFCORECLKDIV & ~_CMU_HFCORECLKDIV_HFCORECLKDIV_MASK) |
786 (div << _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT);
787
788 /* Update CMSIS core clock variable */
789 /* (The function will update the global variable) */
790 freq = SystemCoreClockGet();
791
792 /* Optimize flash access wait state setting for current core clk */
793 CMU_FlashWaitStateControl(freq);
794 break;
795

Callers 3

SysTick_ConfigurationFunction · 0.85
rt_hw_leuart_unit_initFunction · 0.85
rt_hw_rtc_initFunction · 0.85

Calls 5

CMU_FlashWaitStateMaxFunction · 0.85
CMU_DivToLog2Function · 0.85
CMU_SyncFunction · 0.85
SystemCoreClockGetFunction · 0.50

Tested by

no test coverage detected