| 119 | extern char XLPResetEntry[], XLPResetEntryEnd[]; |
| 120 | |
| 121 | static void |
| 122 | xlp_setup_core(void) |
| 123 | { |
| 124 | uint64_t reg; |
| 125 | |
| 126 | reg = nlm_mfcr(LSU_DEFEATURE); |
| 127 | /* Enable Unaligned and L2HPE */ |
| 128 | reg |= (1 << 30) | (1 << 23); |
| 129 | /* |
| 130 | * Experimental : Enable SUE |
| 131 | * Speculative Unmap Enable. Enable speculative L2 cache request for |
| 132 | * unmapped access. |
| 133 | */ |
| 134 | reg |= (1ull << 31); |
| 135 | /* Clear S1RCM - A0 errata */ |
| 136 | reg &= ~0xeull; |
| 137 | nlm_mtcr(LSU_DEFEATURE, reg); |
| 138 | |
| 139 | reg = nlm_mfcr(SCHED_DEFEATURE); |
| 140 | /* Experimental: Disable BRU accepting ALU ops - A0 errata */ |
| 141 | reg |= (1 << 24); |
| 142 | nlm_mtcr(SCHED_DEFEATURE, reg); |
| 143 | } |
| 144 | |
| 145 | static void |
| 146 | xlp_setup_mmu(void) |
no test coverage detected