| 836 | } |
| 837 | |
| 838 | static int |
| 839 | dbg_reset_state(void) |
| 840 | { |
| 841 | u_int cpuid; |
| 842 | size_t i; |
| 843 | int err; |
| 844 | |
| 845 | cpuid = PCPU_GET(cpuid); |
| 846 | err = 0; |
| 847 | |
| 848 | switch (dbg_model) { |
| 849 | case ID_DFR0_CP_DEBUG_M_V6: |
| 850 | case ID_DFR0_CP_DEBUG_M_V6_1: /* fall through */ |
| 851 | /* |
| 852 | * Arch needs monitor mode selected and enabled |
| 853 | * to be able to access breakpoint/watchpoint registers. |
| 854 | */ |
| 855 | err = dbg_enable_monitor(); |
| 856 | if (err != 0) |
| 857 | return (err); |
| 858 | goto vectr_clr; |
| 859 | case ID_DFR0_CP_DEBUG_M_V7: |
| 860 | /* Is core power domain powered up? */ |
| 861 | if ((cp14_dbgprsr_get() & DBGPRSR_PU) == 0) |
| 862 | err = ENXIO; |
| 863 | |
| 864 | if (err != 0) |
| 865 | break; |
| 866 | |
| 867 | if (dbg_ossr) |
| 868 | goto vectr_clr; |
| 869 | break; |
| 870 | case ID_DFR0_CP_DEBUG_M_V7_1: |
| 871 | /* Is double lock set? */ |
| 872 | if ((cp14_dbgosdlr_get() & DBGPRSR_DLK) != 0) |
| 873 | err = ENXIO; |
| 874 | |
| 875 | break; |
| 876 | default: |
| 877 | break; |
| 878 | } |
| 879 | |
| 880 | if (err != 0) { |
| 881 | db_printf("Debug facility locked (CPU%d)\n", cpuid); |
| 882 | return (err); |
| 883 | } |
| 884 | |
| 885 | /* |
| 886 | * DBGOSLAR is always implemented for v7.1 Debug Arch. however is |
| 887 | * optional for v7 (depends on OS save and restore support). |
| 888 | */ |
| 889 | if (((dbg_model & ID_DFR0_CP_DEBUG_M_V7_1) != 0) || dbg_ossr) { |
| 890 | /* |
| 891 | * Clear OS lock. |
| 892 | * Writing any other value than 0xC5ACCESS will unlock. |
| 893 | */ |
| 894 | cp14_dbgoslar_set(0); |
| 895 | isb(); |
no test coverage detected