| 3965 | } |
| 3966 | |
| 3967 | static inline int16_t |
| 3968 | dlb2_hw_dequeue_sparse(struct dlb2_eventdev *dlb2, |
| 3969 | struct dlb2_eventdev_port *ev_port, |
| 3970 | struct rte_event *events, |
| 3971 | uint16_t max_num, |
| 3972 | uint64_t dequeue_timeout_ticks) |
| 3973 | { |
| 3974 | uint64_t start_ticks = 0ULL; |
| 3975 | struct dlb2_port *qm_port; |
| 3976 | int num = 0; |
| 3977 | bool use_scalar; |
| 3978 | uint64_t timeout; |
| 3979 | |
| 3980 | qm_port = &ev_port->qm_port; |
| 3981 | use_scalar = qm_port->use_scalar; |
| 3982 | |
| 3983 | if (!dlb2->global_dequeue_wait) |
| 3984 | timeout = dequeue_timeout_ticks; |
| 3985 | else |
| 3986 | timeout = dlb2->global_dequeue_wait_ticks; |
| 3987 | |
| 3988 | start_ticks = rte_get_timer_cycles(); |
| 3989 | |
| 3990 | use_scalar = use_scalar || (max_num & 0x3); |
| 3991 | |
| 3992 | while (num < max_num) { |
| 3993 | struct dlb2_dequeue_qe qes[DLB2_NUM_QES_PER_CACHE_LINE]; |
| 3994 | int num_avail; |
| 3995 | |
| 3996 | if (use_scalar) { |
| 3997 | int n_iter = 0; |
| 3998 | uint64_t m_rshift, m_lshift, m2_rshift, m2_lshift; |
| 3999 | |
| 4000 | num_avail = dlb2_recv_qe_sparse(qm_port, qes); |
| 4001 | num_avail = RTE_MIN(num_avail, max_num - num); |
| 4002 | dlb2_inc_cq_idx(qm_port, num_avail << 2); |
| 4003 | if (num_avail == DLB2_NUM_QES_PER_CACHE_LINE) |
| 4004 | n_iter = dlb2_process_dequeue_four_qes(ev_port, |
| 4005 | qm_port, |
| 4006 | &events[num], |
| 4007 | &qes[0]); |
| 4008 | else if (num_avail) |
| 4009 | n_iter = dlb2_process_dequeue_qes(ev_port, |
| 4010 | qm_port, |
| 4011 | &events[num], |
| 4012 | &qes[0], |
| 4013 | num_avail); |
| 4014 | if (n_iter != 0) { |
| 4015 | num += n_iter; |
| 4016 | /* update rolling_mask for vector code support */ |
| 4017 | m_rshift = qm_port->cq_rolling_mask >> n_iter; |
| 4018 | m_lshift = qm_port->cq_rolling_mask << (64 - n_iter); |
| 4019 | m2_rshift = qm_port->cq_rolling_mask_2 >> n_iter; |
| 4020 | m2_lshift = qm_port->cq_rolling_mask_2 << |
| 4021 | (64 - n_iter); |
| 4022 | qm_port->cq_rolling_mask = (m_rshift | m2_lshift); |
| 4023 | qm_port->cq_rolling_mask_2 = (m2_rshift | m_lshift); |
| 4024 | } |
no test coverage detected