| 2490 | } |
| 2491 | |
| 2492 | void record_dma_write(uae_u16 reg, uae_u32 dat, uae_u32 addr, int type, int extra) |
| 2493 | { |
| 2494 | struct dma_rec *dr; |
| 2495 | |
| 2496 | if (!dma_record_data) { |
| 2497 | dma_record_init(); |
| 2498 | if (!dma_record_data) |
| 2499 | return; |
| 2500 | } |
| 2501 | |
| 2502 | dr = &dma_record_data[dma_record_cycle]; |
| 2503 | if (dr->reg != 0xffff) { |
| 2504 | dr->cf_reg = reg; |
| 2505 | dr->cf_dat = dat; |
| 2506 | dr->cf_addr = addr; |
| 2507 | dma_conflict(dr->vpos[0], dr->hpos, dr, reg, false); |
| 2508 | return; |
| 2509 | } |
| 2510 | dr->reg = reg; |
| 2511 | dr->dat = dat; |
| 2512 | dr->addr = addr; |
| 2513 | dr->type = type; |
| 2514 | dr->extra = extra; |
| 2515 | dr->intlev = regs.intmask; |
| 2516 | dr->ipl = regs.ipl_pin; |
| 2517 | dr->size = 2; |
| 2518 | dr->end = false; |
| 2519 | last_dma_rec = dr; |
| 2520 | debug_mark_refreshed(dr->addr); |
| 2521 | } |
| 2522 | |
| 2523 | void record_dma_read_value_pos(uae_u32 v) |
| 2524 | { |
no test coverage detected