| 4335 | } |
| 4336 | |
| 4337 | static void is_valid_dma(int reg, int ptrreg, uaecptr addr) |
| 4338 | { |
| 4339 | if (!memwatch_access_validator) |
| 4340 | return; |
| 4341 | if (reg == 0x1fe) // refresh |
| 4342 | return; |
| 4343 | if (currprefs.z3chipmem.size) { |
| 4344 | if (addr >= currprefs.z3chipmem.start_address && addr < currprefs.z3chipmem.start_address + currprefs.z3chipmem.size) |
| 4345 | return; |
| 4346 | } |
| 4347 | if (!(addr & ~(currprefs.chipmem.size - 1))) |
| 4348 | return; |
| 4349 | const struct customData *cdreg = &custd[reg >> 1]; |
| 4350 | const struct customData *cdptr = &custd[ptrreg >> 1]; |
| 4351 | write_log(_T("DMA DAT %04x (%s), PT %04x (%s) accessed invalid memory %08x. Init: %08x, PC/COP=%08x\n"), |
| 4352 | reg, cdreg->name, ptrreg, cdptr->name, addr, |
| 4353 | (custom_storage[ptrreg >> 1].value << 16) | (custom_storage[(ptrreg >> 1) + 1].value), |
| 4354 | custom_storage[ptrreg >> 1].pc); |
| 4355 | } |
| 4356 | |
| 4357 | static void mungwall_memwatch(uaecptr addr, int rwi, int size, uae_u32 valp) |
| 4358 | { |
no test coverage detected