Functions — github.com/digorithm/LC-3-Rust

hub / github.com/digorithm/LC-3-Rust / functions

Functions27 in github.com/digorithm/LC-3-Rust

⨍ Functions 27 ◇ Types & classes 7

↓ 16 callersMethodget

(&self, index: u16)

src/hardware/register/mod.rs:52

↓ 13 callersMethodupdate

(&mut self, index: u16, value: u16)

src/hardware/register/mod.rs:36

↓ 11 callersFunctionsign_extend

(mut x: u16, bit_count: u8)

src/hardware/instruction/mod.rs:558

↓ 10 callersMethodread_memory

(&mut self, address: u16)

src/hardware/vm/mod.rs:21

↓ 7 callersMethodupdate_r_cond_register

Update the condition register based on the value that's inside the register `r`.

src/hardware/register/mod.rs:69

↓ 7 callersMethodwrite_memory

(&mut self, address: usize, value: u16)

src/hardware/vm/mod.rs:39

↓ 1 callersFunctionadd

ADD takes two values and stores them in a register. In register mode, the second value to add is found in a register. In immediate mode, the second va

src/hardware/instruction/mod.rs:117

↓ 1 callersFunctionand

Your good old logical `and` function. Two operation modes, immediate or passing a register. 15 12 │11 9│8 6│ 5 │4 3│2

src/hardware/instruction/mod.rs:198

↓ 1 callersFunctionbr

The branching operation; means to go somewhere else in the assembly code depending on whether some conditions are met. The condition codes specified b

src/hardware/instruction/mod.rs:246

↓ 1 callersFunctionexecute_instruction

(instr: u16, vm: &mut VM)

src/hardware/instruction/mod.rs:47

↓ 1 callersFunctionexecute_program

(vm: &mut VM)

src/hardware/mod.rs:11

↓ 1 callersFunctionget_op_code

Each instruction is 16 bits long, with the left 4 bits storing the opcode. The rest of the bits are used to store the parameters. To extract left 4 bi

src/hardware/instruction/mod.rs:75

↓ 1 callersMethodhandle_keyboard

(&mut self)

src/hardware/vm/mod.rs:28

↓ 1 callersFunctionjmp

The program unconditionally jumps to the location specified by the contents of the base register. Bits [8:6] identify the base register. `RET` is list

src/hardware/instruction/mod.rs:280

↓ 1 callersFunctionjsr

First, the incremented PC is saved in R7. This is the linkage back to the calling routine. Then the PC is loaded with the address of the first instruc

src/hardware/instruction/mod.rs:302

↓ 1 callersFunctionld

An address is computed by sign-extending bits [8:0] to 16 bits and adding this value to the incremented PC. The contents of memory at this address are

src/hardware/instruction/mod.rs:335

↓ 1 callersFunctionldi

Load indirect An address is computed by sign-extending bits [8:0] to 16 bits and adding this value to the incremented PC. What is stored in memory at

src/hardware/instruction/mod.rs:170

↓ 1 callersFunctionldr

Load base + offset An address is computed by sign-extending bits [5:0] to 16 bits and adding this value to the contents of the register specified by b

src/hardware/instruction/mod.rs:362

↓ 1 callersFunctionlea

An address is computed by sign-extending bits [8:0] to 16 bits and adding this value to the incremented PC. This address is loaded into DR. The condit

src/hardware/instruction/mod.rs:392

↓ 1 callersFunctionnot

Simple binary negation. 15 12 │11 9│8 6│ 5 │4 0 ┌───────────────┼───────────┼───────────┼───┼────────────────

src/hardware/instruction/mod.rs:225

↓ 1 callersFunctionst

The contents of the register specified by SR are stored in the memory location whose address is computed by sign-extending bits [8:0] to 16 bits and a

src/hardware/instruction/mod.rs:420

↓ 1 callersFunctionsti

The contents of the register specified by SR are stored in the memory location whose address is obtained as follows: Bits [8:0] are sign-extended to 1

src/hardware/instruction/mod.rs:445

↓ 1 callersFunctionstr

The contents of the register specified by SR are stored in the memory location whose address is computed by sign-extending bits [5:0] to 16 bits and a

src/hardware/instruction/mod.rs:471

↓ 1 callersFunctiontrap

`trap` fn allows interacting with I/O devices First R7 is loaded with the incremented PC. (This enables a return to the instruction physically followi

src/hardware/instruction/mod.rs:494

src/hardware/register/mod.rs:21

Methodnew

()

src/hardware/vm/mod.rs:14