| 327 | } |
| 328 | |
| 329 | void ndspiUpdateChn(void) |
| 330 | { |
| 331 | int i; |
| 332 | for (i = 0; i < 24; i ++) |
| 333 | { |
| 334 | ndspChnSt* chn = &ndspChn[i]; |
| 335 | DspChnStruct* st = ndspiGetChnStruct(i); |
| 336 | LightLock_Lock(&chn->lock); |
| 337 | |
| 338 | u32 flags = chn->flags; |
| 339 | u32 stflags = st->flags; |
| 340 | |
| 341 | if (flags & CFLAG_INITPARAMS) |
| 342 | stflags |= 0x20000000; |
| 343 | |
| 344 | if (flags & CFLAG_MIX) |
| 345 | { |
| 346 | memcpy(st->mix, chn->mix, sizeof(st->mix)); |
| 347 | stflags |= 0xE000000; |
| 348 | } |
| 349 | |
| 350 | if (flags & CFLAG_RATE) |
| 351 | { |
| 352 | st->rate = chn->rate; |
| 353 | stflags |= 0x40000; |
| 354 | if (chn->interpType == 0) |
| 355 | flags |= CFLAG_INTERPTYPE; |
| 356 | } |
| 357 | |
| 358 | if (flags & CFLAG_IIRFILTERTYPE) |
| 359 | { |
| 360 | st->iirFilterType = chn->iirFilterType; |
| 361 | stflags |= 0x400000; |
| 362 | } |
| 363 | |
| 364 | // TODO: IIR filter coefficent update |
| 365 | |
| 366 | if (flags & CFLAG_INTERPTYPE) |
| 367 | { |
| 368 | st->rim[0] = chn->interpType; |
| 369 | if (chn->interpType == NDSP_INTERP_POLYPHASE) |
| 370 | { |
| 371 | if (chn->rate <= 1.0f) |
| 372 | st->rim[1] = NDSP_INTERP_NONE; |
| 373 | else if (chn->rate <= (4.0f/3)) |
| 374 | st->rim[1] = NDSP_INTERP_LINEAR; |
| 375 | else |
| 376 | st->rim[1] = NDSP_INTERP_POLYPHASE; |
| 377 | } else |
| 378 | st->rim[1] = NDSP_INTERP_LINEAR; |
| 379 | stflags |= 0x20000; |
| 380 | } |
| 381 | |
| 382 | if (flags & CFLAG_ADPCMCOEFS) |
| 383 | { |
| 384 | memcpy(ndspiGetChnAdpcmCoefs(i), chn->adpcmCoefs, sizeof(chn->adpcmCoefs)); |
| 385 | stflags |= 4; |
| 386 | } |
no test coverage detected