Code
Hub
Workspaces
Following
Trending
Connect
MCP
copy
Create free account
hub
/
github.com/daniel5151/armv4t_emu
/ functions
Functions
76 in github.com/daniel5151/armv4t_emu
⨍
Functions
76
◇
Types & classes
10
↓ 91 callers
Method
extract
(self, off: u8, len: u8)
src/util.rs:41
↓ 65 callers
Method
get_bit
(self, bit: u8)
src/util.rs:59
↓ 11 callers
Method
r32
(&mut self, addr: u32)
src/alignment.rs:24
↓ 10 callers
Method
sub_flags
(self, rhs: u32, carry: u32)
src/util.rs:141
↓ 9 callers
Method
w32
(&mut self, addr: u32, val: u32)
src/alignment.rs:46
↓ 7 callers
Method
get
(&self, bank: usize, reg: Reg)
src/reg.rs:157
↓ 6 callers
Method
add_flags
(self, rhs: u32, carry: u32)
src/util.rs:125
↓ 6 callers
Method
r16
(&mut self, addr: u32)
src/alignment.rs:19
↓ 6 callers
Method
r8
(&mut self, addr: u32)
src/alignment.rs:14
↓ 6 callers
Method
set
(&mut self, bank: usize, reg: Reg, mut val: u32)
src/reg.rs:127
↓ 4 callers
Function
arg_shift
(val: u32, shift: u32, shift_type: u32)
src/util.rs:198
↓ 4 callers
Method
reg_bank
(self)
src/mode.rs:44
↓ 4 callers
Method
update_bank
(&mut self)
src/reg.rs:122
↓ 4 callers
Method
w8
(&mut self, addr: u32, val: u8)
src/alignment.rs:36
↓ 3 callers
Function
arg_shift0
(val: u32, shift_type: u32, c: u32)
src/util.rs:213
↓ 3 callers
Function
build_flags
(v: u32, c: u32, z: u32, n: u32)
src/util.rs:229
↓ 3 callers
Method
exception
Trigger a CPU exception.
src/lib.rs:185
↓ 3 callers
Method
set_bit
(self, off: u8, len: u8, val: u32)
src/util.rs:52
↓ 3 callers
Method
w16
(&mut self, addr: u32, val: u16)
src/alignment.rs:41
↓ 2 callers
Function
combine64
(hi: u32, lo: u32)
src/util.rs:27
↓ 2 callers
Function
cond_met
(cond: u32, cpsr: u32)
src/util.rs:234
↓ 2 callers
Method
mask_match
(self, mask: u32, test: u32)
src/util.rs:47
↓ 2 callers
Method
mode
Returns the current processor mode.
src/lib.rs:243
↓ 2 callers
Method
r16
(&mut self, addr: u32)
src/example_mem.rs:39
↓ 2 callers
Method
r8
(&mut self, addr: u32)
src/example_mem.rs:35
↓ 2 callers
Method
reg_set
Manually set a register's value.
src/lib.rs:233
↓ 2 callers
Method
shift_asr
(self, rot: u32)
src/util.rs:91
↓ 2 callers
Method
shift_lsr
(self, rot: u32)
src/util.rs:81
↓ 2 callers
Method
shift_ror
(self, rot: u32)
src/util.rs:103
↓ 2 callers
Method
sign_extend
(self, len: u8)
src/util.rs:65
↓ 2 callers
Method
w16
(&mut self, addr: u32, val: u16)
src/example_mem.rs:51
↓ 2 callers
Method
w8
(&mut self, addr: u32, val: u8)
src/example_mem.rs:47
↓ 1 callers
Method
address
(self)
src/exception.rs:34
↓ 1 callers
Method
bits
(self)
src/mode.rs:30
↓ 1 callers
Method
execute_arm
Executes one instruction and returns whether the CPU should continue executing.
src/arm.rs:95
↓ 1 callers
Method
execute_thumb
Executes one instruction and returns whether the CPU should continue executing.
src/thumb.rs:100
↓ 1 callers
Method
fiq_disable
(self)
src/exception.rs:48
↓ 1 callers
Method
fiq_enable
Check if FIQs are enabled.
src/lib.rs:253
↓ 1 callers
Method
irq_enable
Check if IRQs are enabled.
src/lib.rs:248
↓ 1 callers
Method
is_neg
(self)
src/util.rs:119
↓ 1 callers
Method
mode
(&self)
src/reg.rs:114
↓ 1 callers
Method
mode_on_entry
(self)
src/exception.rs:19
↓ 1 callers
Method
pattern
(self)
src/thumb.rs:60
↓ 1 callers
Method
pattern
(self)
src/arm.rs:57
↓ 1 callers
Method
shift_lsl
(self, rot: u32)
src/util.rs:72
↓ 1 callers
Function
split64
(quad: u64)
src/util.rs:34
↓ 1 callers
Method
thumb_mode
Check if CPU is currently in Thumb mode.
src/lib.rs:228
↓ 1 callers
Method
x16
(&mut self, addr: u32)
src/alignment.rs:50
↓ 1 callers
Method
x32
(&mut self, addr: u32)
src/alignment.rs:54
Method
decode
(inst: u16)
src/thumb.rs:86
Method
decode
(inst: u32)
src/arm.rs:81
Method
default
()
src/lib.rs:131
Method
eq
(&self, other: &Self)
src/reg.rs:63
Method
fmt
(&self, fmt: &mut std::fmt::Formatter)
src/lib.rs:125
Method
fmt
(&self, fmt: &mut std::fmt::Formatter)
src/reg.rs:73
Method
from_bits
(mode: u8)
src/mode.rs:15
Method
index
(&self, idx: Reg)
src/reg.rs:165
Method
index_mut
(&mut self, idx: Reg)
src/reg.rs:172
Method
is_pos
(self)
src/util.rs:114
Method
new
Construct a new ARMv4T `Cpu`, with registers set to default "cold-boot" values. Specifically, `PC` is set to `0x00000000`, and `CPSR` is set to `0xd3
src/lib.rs:144
Method
new
Constructs a new, empty ExampleMem.
src/example_mem.rs:17
Method
new
(mmu: &mut T)
src/alignment.rs:8
Method
new_empty
()
src/reg.rs:106
Method
new_with_data
Constructs a new ExampleMem from the provided slice. Data is copied contiguously from the slice into address [0..data.len()]
src/example_mem.rs:23
Method
r32
(&mut self, addr: u32)
src/example_mem.rs:43
Method
reg_get
Returns a register's value.
src/lib.rs:238
Function
signed_conversions
()
src/util.rs:161
Method
step
Step the CPU a single instruction with the given memory object. As a testing convenience, this method returns false if a undefined instruction except
src/lib.rs:168
Function
test_decode
()
src/thumb.rs:515
Function
test_decode
()
src/arm.rs:618
Function
test_overrotate
()
src/util.rs:170
Function
test_shifts
()
src/util.rs:176
Function
test_sign_extend
()
src/util.rs:185
Method
w32
(&mut self, addr: u32, val: u32)
src/example_mem.rs:56
Method
x16
Read a 16-bit value from `addr`, instruction interface (defaults to data interface)
src/lib.rs:100
Method
x32
Read a 32-bit value from `addr`, instruction interface (defaults to data interface)
src/lib.rs:104