| 721 | } |
| 722 | |
| 723 | void TriTextureRes::UpdateLodRequest( Tr2TextureLodUpdateRequest& request, Tr2TextureLodManager& manager ) |
| 724 | { |
| 725 | ON_BLOCK_EXIT( [&] { m_requestedMip = INVALID_LOD; } ); |
| 726 | |
| 727 | request.mipChange = 0; |
| 728 | |
| 729 | if( !IsGood() || !m_lodEnabled || m_originalResolution == 0 ) |
| 730 | { |
| 731 | return; |
| 732 | } |
| 733 | |
| 734 | if( m_requestedMip == INVALID_LOD && !m_ownTexture.IsValid() ) |
| 735 | { |
| 736 | // We don't have any GPU texture created and nobody asked for a specific MIP, so let's create a largest one |
| 737 | m_requestedMip = m_cpuMip; |
| 738 | } |
| 739 | |
| 740 | if( m_requestedMip == INVALID_LOD ) |
| 741 | { |
| 742 | if( manager.NeedToTrimCpuTexture() ) |
| 743 | { |
| 744 | TrimLods( m_maxMip, manager ); |
| 745 | } |
| 746 | return; |
| 747 | } |
| 748 | |
| 749 | AtomicMinUpdate( m_requestedMip, m_maxMip ); |
| 750 | |
| 751 | if( m_gpuMip == m_requestedMip ) |
| 752 | { |
| 753 | if( manager.NeedToTrimCpuTexture() ) |
| 754 | { |
| 755 | if( m_cpuMip + 1 < m_requestedMip ) |
| 756 | { |
| 757 | TrimLods( m_requestedMip - 1, manager ); |
| 758 | } |
| 759 | else |
| 760 | { |
| 761 | TrimLods( m_maxMip, manager ); |
| 762 | } |
| 763 | } |
| 764 | return; |
| 765 | } |
| 766 | |
| 767 | if( m_requestedMip != m_gpuMip ) |
| 768 | { |
| 769 | request.mipChange = int32_t( m_requestedMip ) - int32_t( m_gpuMip ); |
| 770 | ++request.frameNumber; |
| 771 | request.cachedInRam = m_cpuMip <= m_requestedMip; |
| 772 | } |
| 773 | } |
| 774 | |
| 775 | void TriTextureRes::ProcessLodRequest( const Tr2TextureLodUpdateRequest& request, Tr2TextureLodManager& manager ) |
| 776 | { |
no test coverage detected