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Function DecodeT2AddrModeSOReg

arch/ARM/ARMDisassembler.c:3577–3605  ·  view source on GitHub ↗

Source from the content-addressed store, hash-verified

3575}
3576
3577static DecodeStatus DecodeT2AddrModeSOReg(MCInst *Inst, unsigned Val,
3578 uint64_t Address, const void *Decoder)
3579{
3580 DecodeStatus S = MCDisassembler_Success;
3581 unsigned Rn = fieldFromInstruction_4(Val, 6, 4);
3582 unsigned Rm = fieldFromInstruction_4(Val, 2, 4);
3583 unsigned imm = fieldFromInstruction_4(Val, 0, 2);
3584
3585 // Thumb stores cannot use PC as dest register.
3586 switch (MCInst_getOpcode(Inst)) {
3587 case ARM_t2STRHs:
3588 case ARM_t2STRBs:
3589 case ARM_t2STRs:
3590 if (Rn == 15)
3591 return MCDisassembler_Fail;
3592 default:
3593 break;
3594 }
3595
3596 if (!Check(&S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
3597 return MCDisassembler_Fail;
3598
3599 if (!Check(&S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))
3600 return MCDisassembler_Fail;
3601
3602 MCOperand_CreateImm0(Inst, imm);
3603
3604 return S;
3605}
3606
3607static DecodeStatus DecodeT2LoadShift(MCInst *Inst, unsigned Insn,
3608 uint64_t Address, const void *Decoder)

Callers 1

DecodeT2LoadShiftFunction · 0.85

Calls 5

MCInst_getOpcodeFunction · 0.85
DecoderGPRRegisterClassFunction · 0.85
MCOperand_CreateImm0Function · 0.85
CheckFunction · 0.70
DecodeGPRRegisterClassFunction · 0.70

Tested by

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