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Function DecodeForVMRSandVMSR

arch/ARM/ARMDisassembler.c:5736–5761  ·  view source on GitHub ↗

Source from the content-addressed store, hash-verified

5734}
5735
5736static DecodeStatus DecodeForVMRSandVMSR(MCInst *Inst, unsigned Val,
5737 uint64_t Address, const void *Decoder)
5738{
5739 DecodeStatus result = MCDisassembler_Success;
5740 bool HasV8Ops = ARM_getFeatureBits(Inst->csh->mode, ARM_HasV8Ops);
5741 unsigned Rt = fieldFromInstruction_4(Val, 12, 4);
5742
5743 if ((Inst->csh->mode & CS_MODE_THUMB) && !HasV8Ops) {
5744 if (Rt == 13 || Rt == 15)
5745 result = MCDisassembler_SoftFail;
5746
5747 Check(&result, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder));
5748 } else
5749 Check(&result, DecodeGPRnopcRegisterClass(Inst, Rt, Address, Decoder));
5750
5751 if (Inst->csh->mode & CS_MODE_THUMB) {
5752 MCOperand_CreateImm0(Inst, ARMCC_AL);
5753 MCOperand_CreateReg0(Inst, 0);
5754 } else {
5755 unsigned pred = fieldFromInstruction_4(Val, 28, 4);
5756 if (!Check(&result, DecodePredicateOperand(Inst, pred, Address, Decoder)))
5757 return MCDisassembler_Fail;
5758 }
5759
5760 return result;
5761}
5762
5763#endif

Callers

nothing calls this directly

Calls 7

ARM_getFeatureBitsFunction · 0.85
MCOperand_CreateImm0Function · 0.85
MCOperand_CreateReg0Function · 0.85
DecodePredicateOperandFunction · 0.85
CheckFunction · 0.70
DecodeGPRRegisterClassFunction · 0.70

Tested by

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