MCPcopy Create free account
hub / github.com/capstone-engine/capstone / ARM_getFeatureBits

Function ARM_getFeatureBits

arch/ARM/ARMDisassembler.c:387–422  ·  view source on GitHub ↗

Hacky: enable all features for disassembler

Source from the content-addressed store, hash-verified

385
386// Hacky: enable all features for disassembler
387bool ARM_getFeatureBits(unsigned int mode, unsigned int feature)
388{
389 if ((mode & CS_MODE_V8) == 0) {
390 // not V8 mode
391 if (feature == ARM_HasV8Ops || feature == ARM_HasV8_1aOps ||
392 feature == ARM_HasV8_4aOps || feature == ARM_HasV8_3aOps)
393 // HasV8MBaselineOps
394 return false;
395 }
396 if (feature == ARM_FeatureVFPOnlySP)
397 return false;
398
399 if ((mode & CS_MODE_MCLASS) == 0) {
400 if (feature == ARM_FeatureMClass)
401 return false;
402 }
403
404 if ((mode & CS_MODE_THUMB) == 0) {
405 // not Thumb
406 if (feature == ARM_FeatureThumb2 || feature == ARM_ModeThumb)
407 return false;
408 // FIXME: what mode enables D16?
409 if (feature == ARM_FeatureD16)
410 return false;
411 } else {
412 // Thumb
413 if (feature == ARM_FeatureD16)
414 return false;
415 }
416
417 if (feature == ARM_FeatureMClass && (mode & CS_MODE_MCLASS) == 0)
418 return false;
419
420 // we support everything
421 return true;
422}
423
424#include "ARMGenDisassemblerTables.inc"
425

Callers 15

DecoderGPRRegisterClassFunction · 0.85
DecodeDPRRegisterClassFunction · 0.85
DecodeCopMemInstructionFunction · 0.85
DecodeHINTInstructionFunction · 0.85
DecodeSETPANInstructionFunction · 0.85
DecodeT2LoadShiftFunction · 0.85
DecodeT2LoadImm8Function · 0.85
DecodeT2LoadImm12Function · 0.85
DecodeT2LoadLabelFunction · 0.85
DecodeCoprocessorFunction · 0.85
DecodeMSRMaskFunction · 0.85
DecodeVCVTDFunction · 0.85

Calls

no outgoing calls

Tested by

no test coverage detected

Used in the wild real call sites across dependent graphs

searching dependent graphs…