| 42 | } |
| 43 | |
| 44 | OSErrorHandler OSSetErrorHandler(OSError error, OSErrorHandler handler) |
| 45 | { |
| 46 | OSErrorHandler oldHandler; |
| 47 | BOOL enabled; |
| 48 | |
| 49 | enabled = OSDisableInterrupts(); |
| 50 | oldHandler = __OSErrorTable[error]; |
| 51 | __OSErrorTable[error] = handler; |
| 52 | |
| 53 | if (error == OS_ERROR_FPE) |
| 54 | { |
| 55 | u32 msr; |
| 56 | u32 fpscr; |
| 57 | OSThread* thread; |
| 58 | |
| 59 | msr = PPCMfmsr(); |
| 60 | PPCMtmsr(msr | MSR_FP); |
| 61 | fpscr = PPCMffpscr(); |
| 62 | if (handler) |
| 63 | { |
| 64 | for (thread = __OSActiveThreadQueue.head; thread; thread = thread->linkActive.next) |
| 65 | { |
| 66 | thread->context.srr1 |= MSR_FE0 | MSR_FE1; |
| 67 | if ((thread->context.state & OS_CONTEXT_STATE_FPSAVED) == 0) |
| 68 | { |
| 69 | int i; |
| 70 | thread->context.state |= OS_CONTEXT_STATE_FPSAVED; |
| 71 | for (i = 0; i < 32; ++i) |
| 72 | { |
| 73 | *(u64*)&thread->context.fpr[i] = (u64)0xffffffffffffffffLL; |
| 74 | *(u64*)&thread->context.psf[i] = (u64)0xffffffffffffffffLL; |
| 75 | } |
| 76 | thread->context.fpscr = FPSCR_NI; |
| 77 | } |
| 78 | thread->context.fpscr |= __OSFpscrEnableBits & FPSCR_ENABLE; |
| 79 | thread->context.fpscr &= |
| 80 | ~(FPSCR_VXVC | FPSCR_VXIMZ | FPSCR_VXZDZ | FPSCR_VXIDI | FPSCR_VXISI | |
| 81 | FPSCR_VXSNAN | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI | FPSCR_XX | |
| 82 | FPSCR_ZX | FPSCR_UX | FPSCR_OX | FPSCR_FX | FPSCR_FI); |
| 83 | } |
| 84 | fpscr |= __OSFpscrEnableBits & FPSCR_ENABLE; |
| 85 | msr |= MSR_FE0 | MSR_FE1; |
| 86 | } |
| 87 | else |
| 88 | { |
| 89 | for (thread = __OSActiveThreadQueue.head; thread; thread = thread->linkActive.next) |
| 90 | { |
| 91 | thread->context.srr1 &= ~(MSR_FE0 | MSR_FE1); |
| 92 | thread->context.fpscr &= ~FPSCR_ENABLE; |
| 93 | thread->context.fpscr &= |
| 94 | ~(FPSCR_VXVC | FPSCR_VXIMZ | FPSCR_VXZDZ | FPSCR_VXIDI | FPSCR_VXISI | |
| 95 | FPSCR_VXSNAN | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI | FPSCR_XX | |
| 96 | FPSCR_ZX | FPSCR_UX | FPSCR_OX | FPSCR_FX | FPSCR_FI); |
| 97 | } |
| 98 | fpscr &= ~FPSCR_ENABLE; |
| 99 | msr &= ~(MSR_FE0 | MSR_FE1); |
| 100 | } |
| 101 |
no test coverage detected