| 185 | } |
| 186 | |
| 187 | void DMAErrorHandler(OSError error, OSContext* context, ...) |
| 188 | { |
| 189 | u32 hid2 = PPCMfhid2(); |
| 190 | |
| 191 | OSReport("Machine check received\n"); |
| 192 | OSReport("HID2 = 0x%x SRR1 = 0x%x\n", hid2, context->srr1); |
| 193 | if (!(hid2 & (HID2_DCHERR | HID2_DNCERR | HID2_DCMERR | HID2_DQOERR)) || |
| 194 | !(context->srr1 & SRR1_DMA_BIT)) |
| 195 | { |
| 196 | OSReport("Machine check was not DMA/locked cache related\n"); |
| 197 | OSDumpContext(context); |
| 198 | PPCHalt(); |
| 199 | } |
| 200 | |
| 201 | OSReport("DMAErrorHandler(): An error occurred while processing DMA.\n"); |
| 202 | OSReport("The following errors have been detected and cleared :\n"); |
| 203 | |
| 204 | if (hid2 & HID2_DCHERR) |
| 205 | { |
| 206 | OSReport("\t- Requested a locked cache tag that was already in the cache\n"); |
| 207 | } |
| 208 | |
| 209 | if (hid2 & HID2_DNCERR) |
| 210 | { |
| 211 | OSReport("\t- DMA attempted to access normal cache\n"); |
| 212 | } |
| 213 | |
| 214 | if (hid2 & HID2_DCMERR) |
| 215 | { |
| 216 | OSReport("\t- DMA missed in data cache\n"); |
| 217 | } |
| 218 | |
| 219 | if (hid2 & HID2_DQOERR) |
| 220 | { |
| 221 | OSReport("\t- DMA queue overflowed\n"); |
| 222 | } |
| 223 | |
| 224 | // write hid2 back to clear the error bits |
| 225 | PPCMthid2(hid2); |
| 226 | } |
| 227 | |
| 228 | void __OSCacheInit() |
| 229 | { |
nothing calls this directly
no test coverage detected