| 1743 | } |
| 1744 | |
| 1745 | bool BeMCColorizer::Validate() |
| 1746 | { |
| 1747 | #ifdef _DEBUG |
| 1748 | auto paramsLeft = mContext->mParamsUsedRegs; |
| 1749 | |
| 1750 | for (auto mcBlock : mContext->mBlocks) |
| 1751 | { |
| 1752 | for (auto inst : mcBlock->mInstructions) |
| 1753 | { |
| 1754 | if (paramsLeft.size() == 0) |
| 1755 | break; |
| 1756 | |
| 1757 | if (inst->IsMov()) |
| 1758 | { |
| 1759 | if (inst->mArg1.IsNativeReg()) |
| 1760 | { |
| 1761 | BF_ASSERT(inst->mArg0.IsVReg()); |
| 1762 | |
| 1763 | BF_ASSERT(mContext->GetFullRegister(inst->mArg1.mReg) == paramsLeft[0]); |
| 1764 | paramsLeft.erase(paramsLeft.begin()); |
| 1765 | |
| 1766 | auto vregInfo = mContext->mVRegInfo[inst->mArg0.mVRegIdx]; |
| 1767 | if (vregInfo->mReg != X64Reg_None) |
| 1768 | { |
| 1769 | auto checkReg = mContext->GetFullRegister(vregInfo->mReg); |
| 1770 | //auto itr = std::find(paramsLeft.begin(), paramsLeft.end(), checkReg); |
| 1771 | //if (itr != paramsLeft.end()) |
| 1772 | if (paramsLeft.Contains(checkReg)) |
| 1773 | { |
| 1774 | // This will happen if we have assigned a 'wrong' register to a parameter- |
| 1775 | // a register that is not the 'natural' register (ie: rcx for param0), |
| 1776 | // but it's a register that is already bound to another parameter which |
| 1777 | // will be needed later. Given the 'natural' order of RCX, RDX, R8, R9, |
| 1778 | // This is a valid order still: R10, RCX, R8, R9 since RCX will get written |
| 1779 | // to R10 first so it won't get clobbered, but: RDX, R10, R8, R9 is not |
| 1780 | // valid because RDX gets clobbered before it can be written to R10. |
| 1781 | return false; |
| 1782 | } |
| 1783 | } |
| 1784 | } |
| 1785 | } |
| 1786 | } |
| 1787 | } |
| 1788 | |
| 1789 | #endif |
| 1790 | return true; |
| 1791 | } |
| 1792 | |
| 1793 | ////////////////////////////////////////////////////////////////////////// |
| 1794 |
no test coverage detected