| 126 | |
| 127 | |
| 128 | static size_t WriteILOperand(LowLevelILFunction& il, Instruction& instr, size_t i, size_t addrSize, size_t value) |
| 129 | { |
| 130 | InstructionOperand& operand = instr.operands[i - 1]; |
| 131 | switch (operand.operandClass) |
| 132 | { |
| 133 | case NONE: |
| 134 | case IMM: |
| 135 | return il.Undefined(); |
| 136 | case MEM_IMM: |
| 137 | case MEM_REG: |
| 138 | return il.Operand(i - 1, il.Store(addrSize, GetILOperandMemoryAddress(il, operand, addrSize), value)); |
| 139 | default: |
| 140 | return il.Operand(i - 1, SetRegisterOrNop(il, addrSize, addrSize, operand.reg, value)); |
| 141 | } |
| 142 | } |
| 143 | |
| 144 | |
| 145 | static size_t DirectJump(Architecture* arch, LowLevelILFunction& il, uint64_t target, size_t addrSize) |
no test coverage detected