| 266 | } |
| 267 | |
| 268 | uint32_t get_register(const InstructionOperand *operand, uint32_t registerNumber, char *outBuffer, uint32_t outBufferSize) |
| 269 | { |
| 270 | /* 1) handle system registers */ |
| 271 | if(operand->operandClass == SYS_REG) |
| 272 | { |
| 273 | if (snprintf(outBuffer, outBufferSize, "%s", |
| 274 | get_system_register_name(operand->sysreg)) >= outBufferSize) |
| 275 | return FAILED_TO_DISASSEMBLE_REGISTER; |
| 276 | return 0; |
| 277 | } |
| 278 | |
| 279 | if(operand->operandClass != REG && operand->operandClass != MULTI_REG) |
| 280 | return OPERAND_IS_NOT_REGISTER; |
| 281 | |
| 282 | /* 2) handle shifted registers */ |
| 283 | if (operand->shiftType != ShiftType_NONE) |
| 284 | { |
| 285 | return get_shifted_register(operand, registerNumber, outBuffer, outBufferSize); |
| 286 | } |
| 287 | |
| 288 | char reg_buf[16]; |
| 289 | if(get_register_full(operand->reg[registerNumber], operand, reg_buf)) |
| 290 | return FAILED_TO_DISASSEMBLE_REGISTER; |
| 291 | |
| 292 | /* 3) handle predicate registers */ |
| 293 | if(operand->operandClass == REG && operand->pred_qual && operand->reg[0] >= REG_P0 && operand->reg[0] <= REG_P31) |
| 294 | { |
| 295 | if(snprintf(outBuffer, outBufferSize, "%s/%c", reg_buf, operand->pred_qual) >= outBufferSize) |
| 296 | return FAILED_TO_DISASSEMBLE_REGISTER; |
| 297 | return 0; |
| 298 | } |
| 299 | |
| 300 | /* 4) handle other registers */ |
| 301 | char index[32] = {0}; |
| 302 | if(operand->operandClass == REG && operand->laneUsed) |
| 303 | snprintf(index, sizeof(index), "[%u]", operand->lane); |
| 304 | |
| 305 | if(snprintf(outBuffer, outBufferSize, "%s%s", reg_buf, index) >= outBufferSize) |
| 306 | return FAILED_TO_DISASSEMBLE_REGISTER; |
| 307 | |
| 308 | return 0; |
| 309 | } |
| 310 | |
| 311 | uint32_t get_multireg_operand(const InstructionOperand *operand, char *result, uint32_t result_sz) |
| 312 | { |
no test coverage detected