Function rt_pci_device_alloc_resource

components/drivers/pci/pci.c:528–717

}

rt_err_t rt_pci_device_alloc_resource(struct rt_pci_host_bridge *host_bridge,
        struct rt_pci_device *pdev)
{
    rt_err_t err = RT_EOK;
    rt_size_t size;
    rt_ubase_t addr = 0;
    rt_uint32_t cfg;
    rt_size_t bars_nr;
    rt_uint8_t hdr_type;
    rt_bool_t prefetch = RT_FALSE;
    rt_uint16_t class, command = 0;

    for (int i = 0; i < host_bridge->bus_regions_nr; ++i)
    {
        if (host_bridge->bus_regions[i].flags == PCI_BUS_REGION_F_PREFETCH)
        {
            prefetch = RT_TRUE;
            break;
        }
    }

    rt_pci_read_config_u16(pdev, PCIR_COMMAND, &command);
    command = (command & ~(PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) | PCIM_CMD_BUSMASTEREN;
    rt_pci_read_config_u8(pdev, PCIR_HDRTYPE, &hdr_type);

    if (pdev->hdr_type != hdr_type)
    {
        LOG_W("%s may not initialized", rt_dm_dev_get_name(&pdev->parent));
    }

    switch (hdr_type)
    {
    case PCIM_HDRTYPE_NORMAL:
        bars_nr = PCI_STD_NUM_BARS;
        break;

    case PCIM_HDRTYPE_BRIDGE:
        bars_nr = 2;
        break;

    case PCIM_HDRTYPE_CARDBUS:
        bars_nr = 0;
        break;

    default:
        bars_nr = 0;
        break;
    }

    for (int i = 0; i < bars_nr; ++i)
    {
        rt_ubase_t flags;
        rt_ubase_t bar_base;
        rt_bool_t mem64 = RT_FALSE;
        struct rt_pci_bus_region *region;

        cfg = 0;
        bar_base = PCIR_BAR(i);