| 365 | } |
| 366 | |
| 367 | rt_ssize_t rt_pci_alloc_vector(struct rt_pci_device *pdev, int min, int max, |
| 368 | rt_uint32_t flags, RT_IRQ_AFFINITY_DECLARE((*affinities))) |
| 369 | { |
| 370 | rt_ssize_t res = -RT_ENOSYS; |
| 371 | |
| 372 | if (!pdev || min > max) |
| 373 | { |
| 374 | return -RT_EINVAL; |
| 375 | } |
| 376 | |
| 377 | if (flags & RT_PCI_IRQ_F_AFFINITY) |
| 378 | { |
| 379 | if (!affinities) |
| 380 | { |
| 381 | affinities = msi_affinity_default; |
| 382 | } |
| 383 | } |
| 384 | else |
| 385 | { |
| 386 | affinities = RT_NULL; |
| 387 | } |
| 388 | |
| 389 | if (flags & RT_PCI_IRQ_F_MSIX) |
| 390 | { |
| 391 | res = rt_pci_msix_enable_range_affinity(pdev, RT_NULL, min, max, affinities); |
| 392 | |
| 393 | if (res > 0) |
| 394 | { |
| 395 | return res; |
| 396 | } |
| 397 | } |
| 398 | |
| 399 | if (flags & RT_PCI_IRQ_F_MSI) |
| 400 | { |
| 401 | res = rt_pci_msi_enable_range_affinity(pdev, min, max, affinities); |
| 402 | |
| 403 | if (res > 0) |
| 404 | { |
| 405 | return res; |
| 406 | } |
| 407 | } |
| 408 | |
| 409 | if (flags & RT_PCI_IRQ_F_LEGACY) |
| 410 | { |
| 411 | if (min == 1 && pdev->irq >= 0) |
| 412 | { |
| 413 | if (affinities) |
| 414 | { |
| 415 | int cpuid; |
| 416 | RT_IRQ_AFFINITY_DECLARE(old_affinity); |
| 417 | |
| 418 | /* INTx is shared, we should update it */ |
| 419 | rt_pic_irq_get_affinity(pdev->irq, old_affinity); |
| 420 | |
| 421 | rt_bitmap_for_each_set_bit(affinities[0], cpuid, RT_CPUS_NR) |
| 422 | { |
| 423 | RT_IRQ_AFFINITY_SET(old_affinity, cpuid); |
| 424 | } |
nothing calls this directly
no test coverage detected