| 313 | } |
| 314 | |
| 315 | static void *dma_alloc(struct rt_device *dev, rt_size_t size, |
| 316 | rt_ubase_t *dma_handle, rt_ubase_t flags) |
| 317 | { |
| 318 | void *dma_buffer = RT_NULL; |
| 319 | struct rt_dma_pool *pool; |
| 320 | |
| 321 | region_pool_lock(); |
| 322 | |
| 323 | rt_list_for_each_entry(pool, &dma_pool_nodes, list) |
| 324 | { |
| 325 | if (pool->flags & RT_DMA_F_DEVICE) |
| 326 | { |
| 327 | if (!(flags & RT_DMA_F_DEVICE) || pool->dev != dev) |
| 328 | { |
| 329 | continue; |
| 330 | } |
| 331 | } |
| 332 | else if ((flags & RT_DMA_F_DEVICE)) |
| 333 | { |
| 334 | continue; |
| 335 | } |
| 336 | |
| 337 | if ((flags & RT_DMA_F_NOMAP) && !((pool->flags & RT_DMA_F_NOMAP))) |
| 338 | { |
| 339 | continue; |
| 340 | } |
| 341 | |
| 342 | if ((flags & RT_DMA_F_32BITS) && !((pool->flags & RT_DMA_F_32BITS))) |
| 343 | { |
| 344 | continue; |
| 345 | } |
| 346 | |
| 347 | if ((flags & RT_DMA_F_LINEAR) && !((pool->flags & RT_DMA_F_LINEAR))) |
| 348 | { |
| 349 | continue; |
| 350 | } |
| 351 | |
| 352 | *dma_handle = dma_pool_alloc(pool, size); |
| 353 | |
| 354 | if (*dma_handle && !(flags & RT_DMA_F_NOMAP)) |
| 355 | { |
| 356 | if (flags & RT_DMA_F_NOCACHE) |
| 357 | { |
| 358 | dma_buffer = rt_ioremap_nocache((void *)*dma_handle, size); |
| 359 | } |
| 360 | else |
| 361 | { |
| 362 | dma_buffer = rt_ioremap_cached((void *)*dma_handle, size); |
| 363 | } |
| 364 | |
| 365 | if (!dma_buffer) |
| 366 | { |
| 367 | dma_pool_free(pool, *dma_handle, size); |
| 368 | |
| 369 | continue; |
| 370 | } |
| 371 | |
| 372 | break; |
no test coverage detected