| 484 | } |
| 485 | |
| 486 | struct rt_dma_chan *rt_dma_chan_request(struct rt_device *dev, const char *name) |
| 487 | { |
| 488 | void *fw_data = RT_NULL; |
| 489 | struct rt_dma_chan *chan; |
| 490 | struct rt_ofw_cell_args dma_args; |
| 491 | struct rt_dma_controller *ctrl = RT_NULL; |
| 492 | |
| 493 | if (!dev) |
| 494 | { |
| 495 | return rt_err_ptr(-RT_EINVAL); |
| 496 | } |
| 497 | |
| 498 | if (name) |
| 499 | { |
| 500 | fw_data = &dma_args; |
| 501 | ctrl = ofw_find_dma_controller(dev, name, &dma_args); |
| 502 | } |
| 503 | else |
| 504 | { |
| 505 | struct rt_dma_controller *ctrl_tmp; |
| 506 | |
| 507 | rt_spin_lock(&dmac_nodes_lock); |
| 508 | rt_list_for_each_entry(ctrl_tmp, &dmac_nodes, list) |
| 509 | { |
| 510 | /* Only memory to memory for uname request */ |
| 511 | if (rt_bitmap_test_bit(ctrl_tmp->dir_cap, RT_DMA_MEM_TO_MEM)) |
| 512 | { |
| 513 | ctrl = ctrl_tmp; |
| 514 | break; |
| 515 | } |
| 516 | } |
| 517 | rt_spin_unlock(&dmac_nodes_lock); |
| 518 | } |
| 519 | |
| 520 | if (rt_is_err_or_null(ctrl)) |
| 521 | { |
| 522 | return ctrl ? ctrl : rt_err_ptr(-RT_ENOSYS); |
| 523 | } |
| 524 | |
| 525 | if (ctrl->ops->request_chan) |
| 526 | { |
| 527 | chan = ctrl->ops->request_chan(ctrl, dev, fw_data); |
| 528 | } |
| 529 | else |
| 530 | { |
| 531 | chan = rt_calloc(1, sizeof(*chan)); |
| 532 | |
| 533 | if (!chan) |
| 534 | { |
| 535 | chan = rt_err_ptr(-RT_ENOMEM); |
| 536 | } |
| 537 | } |
| 538 | |
| 539 | if (rt_is_err(chan)) |
| 540 | { |
| 541 | return chan; |
| 542 | } |
| 543 |
nothing calls this directly
no test coverage detected