Raised when a weight update manifest is incomplete or inconsistent.

Raised when a requested transport is not supported by this runtime.

Safe local transport for the weight synchronization protocol. This transport intentionally copies tensors. It is not the final zero-copy

Pure PyTorch native fallback for Fused LogP.

Same-node shared-memory transport with zero-copy import semantics. Publishing creates a shared-memory snapshot of model state. Importing tha

Pure PyTorch native standard-softmax attention reference. out = softmax(Q Kᵀ * scale + masks) @ V Hand-written naive softmax -- delibera

Naive PyTorch reference for fused linear log-prob. Materializes the full ``[N, V]`` logits with a single ``F.linear`` and runs ``log_softmax`

Pure PyTorch reference RoPE — GPT-NeoX style (HF rotate-half). Qwen3-8B defaults: theta=1e6, head_dim=128, full-dimension rotation (half=64).

Configuration for no-cache reference/reward model scoring.

Pure PyTorch native fallback for the fused GRPO loss. Consumes logits directly: the per-token ``policy_ratio`` / ``kl_penalty`` come from the

Pure PyTorch native KV-cache attention reference (ISSUE #108 WS1). Decode/incremental attention: the past keys/values live in a cache and th

Lightweight Reference/Reward scoring wrapper. The executor runs one full-sequence forward pass with ``use_cache=False`` whenever the wra

Raised when a weight update cannot be imported or acknowledged.

Pure PyTorch native language-model-head reference. out = hidden @ weight.t() (+ bias) Projects hidden states back to vocabulary logits -

Pure PyTorch reference GEMM. It intentionally uses one `torch.matmul` call in fp32 for the gold path and does not implement split-K or manual

Pure Pytorch native RMSNorm reference out = x * rsqrt(mean(x^2, dim=-1) + eps) * weight

SM90 (Hopper) TMA+WGMMA fused linear log-prob. Computes ``log_softmax(hidden @ W^T + b)[target]`` without materializing the ``[N, V]`` logits

Unified execution engine for RL rollout (sampling) phase. Manages shared weights and dispatches hardware-specific kernels for large-scale sam

Triton fused linear log-prob op. Computes per-token ``log_softmax(hidden @ W^T + b)[target]`` without materializing the ``[N, V]`` logits: th

Guarded adapter for installing imported tensors into a rollout engine. vLLM does not expose one stable public hot-weight update API across v

Same-node CUDA VMM transport with POSIX-fd zero-copy import semantics. This is the modern CUDA IPC path for WSL2/native Linux runtimes where

One implementation to validate against the gold path.

Central dispatcher for high-performance kernels. Handles dynamic routing between ROCm and CUDA backends at runtime.

Pure PyTorch native token-embedding reference. out = weight[token_ids] (a plain row gather, no accumulation) Maps integer token ids to

PyTorch native fallback for the fused ratio + KL operator.

Dense full-sequence batch for stateless scoring.

Configuration for the optional DeepSpeed training worker.

Pure PyTorch native SwiGLU reference. out = silu(gate) * up = (gate * sigmoid(gate)) * up Middle stage of the Qwen3/Llama MLP: ``gate``

Triton fused GRPO loss op. The per-token ``policy_ratio`` / ``kl_penalty`` are produced by the fused ``ratio_kl`` Triton kernel (logits -> ra

Training worker implementation backed by a real DeepSpeed engine contract. DeepSpeed is optional for RL-Kernel, so importing this module nev

Same-node legacy PyTorch CUDA IPC transport. Publishing creates a complete CUDA snapshot and stores PyTorch `reduce_tensor` handles in t

Pure PyTorch native SiLU reference. out = x * sigmoid(x) (a.k.a. Swish) Element-wise activation used by the Qwen3 SwiGLU MLP (hidd

Fused policy-ratio + KL-penalty op (Triton; CUDA & ROCm).

Result consumed by training workers.

End-to-end performance metrics for a single benchmark run.

Configuration for a generation-style paged-KV scoring baseline.

Standard adapter for the trainable policy model used by RL losses.

Factory and constructor arguments for a worker hosted in a Ray actor.

Build the public vLLM IPC weight-update request shape. vLLM 0.18+ expects `LLM.update_weights({"update_info": ...})` for IPC backends. T

Lazy vLLM wrapper that preserves shared prompt prefixes across candidates.

PyTorch SDPA fallback for FlashAttention-layout tensors.

One deterministic test object for an operator candidate.

Configuration for lazy Ray runtime initialization.

Normalized model outputs consumed by scoring adapters.

Bind vLLM worker parameters to tensors imported from a CUDA VMM manifest. The vLLM worker imports the manifest itself through `apply_model`,

Install a manifest through vLLM's in-process `reload_weights` utility path. This adapter is for single-process vLLM deployments, for example

Configuration for vLLM-backed GRPO rollout sampling.

Immutable public record for a complete published weight update.

Automated end-to-end performance profiling suite. Measures Tokens/sec, TFLOPS, and peak VRAM across different GPU targets for RL-Kernel

Create, wrap, and clean up Ray actors for RL-Kernel workers.

Standard FlashAttention wrapper for ROCm. Demonstrates the reference structure for adding new operator families.

Config shared by local and DeepSpeed training workers.

Install a manifest through vLLM's checkpoint-path reload utility path. This path works with vLLM's default EngineCore multiprocessing becaus

Per-case result for one candidate.

Raised when the optional DeepSpeed runtime cannot be imported.

Standard FlashAttention wrapper for CUDA. Demonstrates the reference structure for adding new operator families.

Hardware target identification for cross-GPU benchmarking.

Stable RL-Kernel view over a vLLM request output candidate.

Per-output comparison result.

Correctness-first baseline for generation-engine-style scoring. This wrapper reserves a paged KV-cache and block table before running the

Standard adapter for the frozen reference model used by KL penalties.

Scoring tensors and scalar metrics produced by the stateless executor.

Attach no-cache reference/reward scores to a completed rollout payload.

Synthetic RL-shaped tensors shared by kernel tests and benchmarks.

Result produced by training workers.

Aggregate report for one candidate implementation.

Hardware-aware context manager for high-performance RL tasks. Provides transparent support for both AMD (ROCm/HIP) and NVIDIA (CUDA) arc