Emits a compressed store instruction. These consist of: funct3 | imm | rs1 | imm | rs2 | op
| 72 | // Emits a compressed store instruction. These consist of: |
| 73 | // funct3 | imm | rs1 | imm | rs2 | op |
| 74 | void EmitCompressedStore(CodeBuffer& buffer, uint32_t funct3, uint32_t imm, GPR rs1, |
| 75 | Register rs2, uint32_t op) { |
| 76 | // This has the same format as a compressed load, with rs2 taking the place of rd. |
| 77 | // We can reuse the code we've already written to handle this. |
| 78 | EmitCompressedLoad(buffer, funct3, imm, rs1, rs2, op); |
| 79 | } |
| 80 | |
| 81 | // Emits a compressed wide immediate instruction. These consist of: |
| 82 | // funct3 | imm | rd | opcode |
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