\brief Data Synchronization Barrier \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory acces

* @brief Provides a tick value in millisecond. * @note This function is declared as __weak to be overwritten in case of other * implementati

* @brief Start the DMA Transfer with interrupt enabled. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains *

* @brief Enables or disables the TIM Capture Compare Channel x. * @param TIMx to select the TIM peripheral * @param Channel specifies the TIM C

* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hi2c I2C handle. * @param DevA

* @brief Aborts the DMA Transfer in Interrupt mode. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * th

\brief Instruction Synchronization Barrier \details Instruction Synchronization Barrier flushes the pipeline in the processor, so that

* @brief Return the response received from the card for the last command * @param SDMMCx: Pointer to SDMMC register base * @param Response: Spe

I2C wrapper functions - get I2C port / slave addr from config struct. */

* @brief Manage the enabling of Interrupts. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configurat

* @brief Configure the SDMMC data path according to the specified * parameters in the SDMMC_DataInitTypeDef. * @param SDMMCx: Pointer to

* @brief Configure the SDMMC command path according to the specified parameters in * SDMMC_CmdInitTypeDef structure and send the command

* @brief Get ADC group regular conversion state. * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing * @param ADCx ADC instance *

Find object lookup entry containing given id and span index Iterate over object lookup pages in each block until a given object id entry is found

* @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. * @param GPIOx: where x can be (A..K) to select

* @brief Manage the disabling of Interrupts. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configura

* addr_offset */

* @brief This function is executed in case of error occurrence. * @retval None */

@defgroup RCCEx_Private_functions RCCEx Private Functions * @{ */ * @brief Configure the PLL2 VCI,VCO ranges, multiplication and division factors a

* @brief Configure the PLL3 VCI,VCO ranges, multiplication and division factors and enable it * @param pll3: Pointer to an RCC_PLL3InitTypeDef str

@defgroup HAL_SDMMC_LL_Group5 Responses management functions * @brief Responses functions * @verbatim ========================================

Deletes a page and removes it from object lookup.

* @brief Returns the current CPU ID. * @retval CPU identifier */

* @brief This function handles I2C Communication Timeout. It waits * until a flag is no longer in the specified status. * @param

* @brief Disable the selected ADC. * @note Prerequisite condition to use this function: ADC conversions must be * stopped. * @param h

* @brief Sets or clears the selected data port bit. * * @note This function uses GPIOx_BSRR register to allow atomic read/modify * ac

* @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH command * @param SDMMCx: Pointer to SDMMC register base * @par

* @brief Get ADC group injected conversion state. * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing * @param ADCx ADC instance

* @brief Return SYSTEM clock frequency * @retval SYSTEM clock frequency (in Hz) */

* @brief Read data (word) from Rx FIFO in blocking mode (polling) * @param SDMMCx: Pointer to SDMMC register base * @retval HAL status */

* @brief Check if PLL2 Ready * @rmtoll CR PLL2RDY LL_RCC_PLL2_IsReady * @retval State of bit (1 or 0). */

* @brief Return HCLK clock frequency * @param SYSCLK_Frequency SYSCLK clock frequency * @retval HCLK clock frequency (in Hz) */

* @brief Enables or disables the TIM Capture Compare Channel xN. * @param TIMx to select the TIM peripheral * @param Channel specifies the TIM

* @brief De-initializes the GPIOx peripheral registers to their default reset values. * @param GPIOx: where x can be (A..K) to select the GPIO per

* @brief I2C Tx data register flush process. * @param hi2c I2C handle. * @retval None */

* @brief I2C interrupts error process. * @param hi2c I2C handle. * @param ErrorCode Error code to handle. * @retval None */

* @brief Get System prescaler * @rmtoll D1CFGR/CDCFGR1 D1CPRE/CDCPRE LL_RCC_GetSysPrescaler * @retval Returned value can be one o

* @brief Send the Status command and check the response. * @param SDMMCx: Pointer to SDMMC register base * @param Argument: Command Argument

* @brief Return PLL2 clocks frequencies * @note LL_RCC_PERIPH_FREQUENCY_NO returned for non activated output or oscillator not ready * @retval

* @brief Wait for a flag state until timeout. * @param hqspi QSPI handle * @param Flag Flag checked * @param State Value of the flag expecte

* @brief Send the Stop Transfer command and check the response. * @param SDMMCx: Pointer to SDMMC register base * @retval HAL status */

* @brief Close Transfer and clear flags. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains * the configuration

* @brief Set the command configuration. * @param hqspi QSPI handle * @param cmd : structure that contains the command configuration information

* @brief Check if HSI clock is ready * @rmtoll CR HSIRDY LL_RCC_HSI_IsReady * @retval State of bit (1 or 0). */

* @brief Check if PLL1 Ready * @rmtoll CR PLL1RDY LL_RCC_PLL1_IsReady * @retval State of bit (1 or 0). */

* @brief Send the Read Multi Block command and check the response * @param SDMMCx: Pointer to SDMMC register base * @retval HAL status */

* @brief Send the Write Multi Block command and check the response * @param SDMMCx: Pointer to SDMMC register base * @retval HAL status */

* @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operation timeout * @param Bank flash FLASH_BANK_1 or FLASH_BAN

* @brief Aborts the DMA Transfer. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration in

* @brief Returns the PLL2 clock frequencies :PLL2_P_Frequency,PLL2_R_Frequency and PLL2_Q_Frequency * @note The PLL2 clock frequencies computed b

* @brief Get for the ADC selected offset number 1, 2, 3 or 4: * Channel to which the offset programmed will be applied * (indepen

* @brief Get HSI divider * @rmtoll CR HSIDIV LL_RCC_HSI_GetDivider * @retval can be one of the following values: * @ar

* @brief Check if PLL3 Ready * @rmtoll CR PLL3RDY LL_RCC_PLL3_IsReady * @retval State of bit (1 or 0). */