* @brief Provides a tick value in millisecond. * @note This function is declared as __weak to be overwritten in case of other * implementat

* @brief Provides a tick value in millisecond. * @note This function is declared as __weak to be overwritten in case of other * implementat

\brief Reverse byte order (32 bit) This function reverses the byte order in integer value. \param [in] value Value to reverse \retu

\brief Data Synchronization Barrier This function acts as a special kind of Data Memory Barrier. It completes when all explicit memory acces

* @brief Provides a tick value in millisecond. * @note This function is declared as __weak to be overwritten in case of other * implem

* @brief C custom defined SMLAD for M3 and M0 processors */

* Dereference a pbuf chain or queue and deallocate any no-longer-used * pbufs at the head of this chain or queue. * * Decrements the pbuf reference

* @brief C custom defined SMLADX for M3 and M0 processors */

* @brief C custom defined SMLALD for M3 and M0 processors */

* @brief Start the DMA Transfer with interrupt enabled. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains *

* @brief Start the DMA Transfer with interrupt enabled. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains *

* @brief Put a Message to a Queue. * @param queue_id message queue ID obtained with \ref osMessageCreate. * @param info message information. *

* @brief C custom defined SMLALDX for M3 and M0 processors */

* @brief Start the DMA Transfer with interrupt enabled. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains *

Called from Systick handler */

* @brief This function configures the Flash prefetch, * Configures time base source, NVIC and Low level hardware * @note This function is

* @brief Aborts the DMA Transfer. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration in

* @brief Enables or disables the TIM Capture Compare Channel x. * @param TIMx to select the TIM peripheral * @param Channel : specifies the TI

* @brief Enables or disables the TIM Capture Compare Channel x. * @param TIMx to select the TIM peripheral * @param Channel: specifies the TIM

* @brief Enables or disables the TIM Capture Compare Channel x. * @param TIMx to select the TIM peripheral * @param Channel: specifies the TIM

* Allocates a pbuf of the given type (possibly a chain for PBUF_POOL type). * * The actual memory allocated for the pbuf is determined by the * lay

* Put an element back into its pool. * * @param type the pool where to put mem * @param mem the memp element to free */

* @brief Aborts the DMA Transfer. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration in

* @brief Aborts the DMA Transfer in Interrupt mode. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * th

* @brief C custom defined QSUB16 for M3 and M0 processors */

* @brief Clips Q63 to Q31 values. */

* Adjusts the payload pointer to hide or reveal headers in the payload. * * Adjusts the ->payload pointer so that space for a header * (dis)appears

* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hi2c: I2C handle. * @param Dev

* @brief C custom defined SHADD16 for M3 and M0 processors */

\brief Rotate Right in unsigned value (32 bit) This function Rotate Right (immediate) provides the value of the contents of a register rotated b

Calls tcp_input() after adjusting current_iphdr_dest */

* @brief Aborts the DMA Transfer in Interrupt mode. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * th

* @brief Sends single byte over SPI * @param *SPIx: Pointer to SPIx peripheral you will use, where x is between 1 to 6 * @param data: 8-bit data

* @brief C custom defined SMUAD for M3 and M0 processors */

Create a TCP segment usable for passing to tcp_input * - IP-addresses, ports, seqno and ackno are taken from pcb * - seqno and ackno can be altered

* @brief C custom defined QSUB for M3 and M0 processors */

* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hi2c I2C handle. * @param DevA

* @brief Convert from 2 digit BCD to Binary. * @param Value: BCD value to be converted * @retval Converted word */

* @brief Converts from 2 digit BCD to Binary. * @param Value: BCD value to be converted * @retval Converted word */

* @brief Converts from 2 digit BCD to Binary. * @param Value: BCD value to be converted * @retval Converted word */

* @brief Handles FMPI2Cx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hfmpi2c FMPI2C handle. * @pa

* @brief This function handles I2C Communication Timeout. * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains *

* @brief This function provides accurate delay (in milliseconds) based * on variable incremented. * @note In the default implementation ,

* @brief Return the response received from the card for the last command * @param SDIOx: Pointer to SDMMC register base * @param Response:

* @brief Return the response received from the card for the last command * @param SDMMCx: Pointer to SDMMC register base * @param Response:

* @brief C custom defined QADD16 for M3 and M0 processors */

* @brief C custom defined SMUSD for M3 and M0 processors */

\brief Instruction Synchronization Barrier Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructio

* @brief Return SYSTEM clock frequency * @retval SYSTEM clock frequency (in Hz) */

* @brief C custom defined SMUADX for M3 and M0 processors */

Copy memory to memory */

* Find out what we can send and send it * * @param pcb Protocol control block for the TCP connection to send data * @return ERR_OK if data has been

* @brief C custom defined QADD for M3 and M0 processors */

* @brief Aborts the DMA Transfer. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration in

* @brief This function provides minimum delay (in milliseconds) based * on variable incremented. * @note In the default implementation , S

* @brief Wait for a FLASH operation to complete. * @param Timeout: maximum flash operationtimeout * @retval HAL_StatusTypeDef HAL Status */

* @brief USBD_CtlSendData * send data on the ctl pipe * @param pdev: device instance * @param buff: pointer to data buffer * @param len: l

* @brief Delays for amount of milli seconds * @param millis: Number of milliseconds for delay * @retval None */

* @brief Manage the enabling of Interrupts. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configurat

* @brief Configure the SDMMC command path according to the specified parameters in * SDIO_CmdInitTypeDef structure and send the command

* @brief Configure the SDMMC command path according to the specified parameters in * SDMMC_CmdInitTypeDef structure and send the command

* @brief I2C error callbacks. * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains * the configuration informat

* @brief This function handles I2C Communication Timeout. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the con

* @brief Force APB1 peripherals reset. * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n * APB1RSTR TIM3RST LL_A

* @brief Release APB1 peripherals reset. * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n * APB1RSTR TIM3RST

* @brief C custom defined SMUSDX for M3 and M0 processors */

Fill memory block */

* @brief Manage the enabling of Interrupts. * @param hfmpi2c Pointer to a FMPI2C_HandleTypeDef structure that contains * the conf