| 10 | /// Returns `InstructionAccessFault` on misalignment or bus error. |
| 11 | pub fn fetch_with_pmp( |
| 12 | bus: &mut SystemBus, |
| 13 | pc: u64, |
| 14 | ctx: mmu::TranslationContext, |
| 15 | tlb: &mut mmu::Tlb, |
| 16 | ) -> Result<u32, VmError> { |
| 17 | if pc & 0x3 != 0 { |
| 18 | return Err(VmError::InstructionAccessFault(pc)); |
| 19 | } |
| 20 | |
| 21 | let phys_addr = mmu::translate_with_pmp(pc, bus, ctx, mmu::AccessKind::Execute, tlb)?; |
| 22 | |
| 23 | bus.read_word(phys_addr) |
| 24 | .map_err(|_| VmError::InstructionAccessFault(pc)) |
| 25 | } |
| 26 | |
| 27 | /// Backwards-compatible wrapper: old callers without PMP info should use this. |
| 28 | /// Uses a throwaway TLB, so it never benefits from caching (test/diagnostic use). |
| 29 | pub fn fetch( |
| 30 | bus: &mut SystemBus, |
| 31 | pc: u64, |
| 32 | satp: u64, |
| 33 | priv_mode: PrivilegeMode, |
| 34 | mstatus: u64, |
| 35 | ) -> Result<u32, VmError> { |