Types & classes — github.com/IBM/ACE-RISCV

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Types & classes158 in github.com/IBM/ACE-RISCV

⨍ Functions 620◇ Types & classes 158

↓ 29 callersClassSbiResponse

security-monitor/src/confidential_flow/handlers/sbi/response.rs:11

↓ 14 callersClassSbiRequest

security-monitor/src/confidential_flow/handlers/sbi/request.rs:9

↓ 6 callersClassSbiResponse

security-monitor/src/non_confidential_flow/handlers/supervisor_binary_interface/response.rs:10

↓ 3 callersClassRemoteHfenceGvmaVmid

security-monitor/src/confidential_flow/handlers/symmetrical_multiprocessing/hfence_gvma_vmid.rs:12

↓ 2 callersClassIpi

security-monitor/src/confidential_flow/handlers/symmetrical_multiprocessing/ipi.rs:14

↓ 2 callersClassReadWriteRiscvCsr

security-monitor/src/core/architecture/riscv/control_status_registers.rs:318

↓ 1 callersClassInvalidCall

security-monitor/src/non_confidential_flow/handlers/supervisor_binary_interface/invalid_call.rs:10

↓ 1 callersClassInvalidCall

security-monitor/src/confidential_flow/handlers/sbi/invalid_call.rs:10

↓ 1 callersClassMmioAccessFault

security-monitor/src/confidential_flow/handlers/mmio/mmio_access_fault.rs:12

↓ 1 callersClassMmioLoadRequest

Handles MMIO load request coming from the confidential hart. This request will be declassified to the hypervisor.

security-monitor/src/confidential_flow/handlers/mmio/mmio_load_request.rs:13

↓ 1 callersClassMmioLoadResponse

security-monitor/src/confidential_flow/handlers/mmio/mmio_load_response.rs:8

↓ 1 callersClassMmioStoreRequest

Handles MMIO store request coming from the confidential hart. This request will be declassified to the hypervisor.

security-monitor/src/confidential_flow/handlers/mmio/mmio_store_request.rs:14

↓ 1 callersClassMmioStoreResponse

Handles MMIO store response coming from the hypervisor.

security-monitor/src/confidential_flow/handlers/mmio/mmio_store_response.rs:9

↓ 1 callersClassNonConfidentialMemoryAddress

security-monitor/src/core/memory_layout/non_confidential_memory_address.rs:20

↓ 1 callersClassRemoteFenceI

security-monitor/src/confidential_flow/handlers/symmetrical_multiprocessing/fence_i.rs:14

↓ 1 callersClassRemoteSfenceVma

security-monitor/src/confidential_flow/handlers/symmetrical_multiprocessing/sfence_vma.rs:15

↓ 1 callersClassRemoteSfenceVmaAsid

security-monitor/src/confidential_flow/handlers/symmetrical_multiprocessing/sfence_vma_asid.rs:16

↓ 1 callersClassShutdownRequest

security-monitor/src/confidential_flow/handlers/shutdown/shutdown_vm.rs:18

↓ 1 callersClassVirtualInstruction

Handles virtual instruction trap that occured during execution of the confidential hart.

security-monitor/src/confidential_flow/handlers/virtual_instructions/mod.rs:9

ClassAddMmioRegion

security-monitor/src/confidential_flow/handlers/mmio/add_mmio_region.rs:12

security-monitor/src/core/page_allocator/page.rs:20

ClassAllowExternalInterrupt

security-monitor/src/confidential_flow/handlers/interrupts/allow_external_interrupt.rs:11

EnumApplyToConfidentialHart

Transformation of the confidential hart state in a response to processing of a confidential hart call.

security-monitor/src/confidential_flow/apply_to_confidential_vm.rs:9

EnumApplyToHypervisorHart

Transformation of the hypervisor state created as a result of processing an SBI request from the hypervisor.

security-monitor/src/non_confidential_flow/apply_to_hypervisor.rs:9

tools/cove_tap_tool/src/main.rs:15

ClassAttestationPayload

security-monitor/rust-crates/riscv_cove_tap/src/spec.rs:14

ClassAttestationPayloadParser

security-monitor/rust-crates/riscv_cove_tap/src/parser.rs:10

ClassAttestationPayloadSerializer

security-monitor/rust-crates/riscv_cove_tap/src/serializer.rs:9

EnumBaseExtension

security-monitor/src/core/architecture/riscv/sbi/base_extension.rs:6

tools/cove_tap_tool/src/main.rs:21

ClassConfidentialFlow

Ensures control flow integrity within the `confidential flow` part of the finite state machine (FSM) of the security monitor. The ConfidentialFlow ha

security-monitor/src/confidential_flow/finite_state_machine.rs:54

ClassConfidentialHart

security-monitor/src/core/control_data/confidential_hart.rs:25

EnumConfidentialHartRemoteCommand

security-monitor/src/core/control_data/confidential_hart_remote_command.rs:18

InterfaceConfidentialHartRemoteCommandExecutable

security-monitor/src/core/control_data/confidential_hart_remote_command.rs:40

ClassConfidentialMemoryAddress

security-monitor/src/core/memory_layout/confidential_memory_address.rs:20

ClassConfidentialVm

security-monitor/src/core/control_data/confidential_vm.rs:15

ClassConfidentialVmId

security-monitor/src/core/control_data/confidential_vm_id.rs:6

ClassConfidentialVmMemoryLayout

security-monitor/src/core/control_data/confidential_vm_memory_layout.rs:6

ClassConfidentialVmMemoryProtector

Exposes an interface to configure the hardware memory isolation component in a way that the confidential VM can access only memory it owns.

security-monitor/src/core/memory_protector/confidential_vm_memory_protector.rs:13

ClassConfidentialVmMmioRegion

Defines a range of guest physical addresses that the security monitor interprets as MMIO address and expose load/store operations to the hypervisor. T

security-monitor/src/core/control_data/confidential_vm_mmio_region.rs:11

ClassConfidentialVmPhysicalAddress

security-monitor/src/core/memory_layout/confidential_vm_physical_address.rs:7

security-monitor/src/debug.rs:93

ClassControlDataStorage

The control data region is located in the confidential memory. It is visible only to the security monitor. The security monitor uses it to store persi

security-monitor/src/core/control_data/storage.rs:16

ClassControlStatusRegister

security-monitor/src/core/architecture/riscv/control_status_registers.rs:286

ClassControlStatusRegisters

security-monitor/src/core/architecture/riscv/control_status_registers.rs:15

EnumCovgExtension

security-monitor/src/core/architecture/riscv/sbi/covg_extension.rs:6

EnumCovhExtension

security-monitor/src/core/architecture/riscv/sbi/covh_extension.rs:6

EnumCoviExtension

security-monitor/src/core/architecture/riscv/sbi/covi_extension.rs:6

EnumDeclassifyToConfidentialVm

Declassifiers that expose part of the hypervisor's state to a confidential VM's hart.

security-monitor/src/confidential_flow/declassify_to_confidential_vm.rs:9

EnumDeclassifyToHypervisor

Declassifiers that expose part of the confidential VM's hart state to the hypervisor.

security-monitor/src/non_confidential_flow/declassify_to_hypervisor.rs:9

ClassDestroyConfidentialVm

This handler implements the `Destroy TVM` function of the CoVE Host ABI.

security-monitor/src/non_confidential_flow/handlers/cove_host_extension/destroy_confidential_vm.rs:10

security-monitor/rust-crates/riscv_cove_tap/src/spec.rs:122

EnumDigestAlgorithm

security-monitor/rust-crates/riscv_cove_tap/src/spec.rs:141

tools/cove_tap_tool/src/error.rs:6

security-monitor/src/error.rs:9

ClassExposeEnabledInterrupts

security-monitor/src/confidential_flow/handlers/interrupts/expose_enabled_interrupts.rs:7

security-monitor/rust-crates/flattened_device_tree/src/error.rs:8

ClassFdtMemoryRegion

security-monitor/rust-crates/flattened_device_tree/src/lib.rs:87

ClassFlattenedDeviceTree

This is a wrapper over a third party library that parses the flattened device tree (FDT).

security-monitor/rust-crates/flattened_device_tree/src/lib.rs:18

ClassFloatingPointUnit

security-monitor/src/core/architecture/riscv/extensions/floating_point_unit.rs:14

EnumGeneralPurposeRegister

security-monitor/src/core/architecture/riscv/general_purpose_registers.rs:44

ClassGeneralPurposeRegisters

security-monitor/src/core/architecture/riscv/general_purpose_registers.rs:9

ClassGetSecurityMonitorInfo

This handler implements the `Get TSM Info` function of the CoVE Host ABI. Returns information to the hypervisor about the state and configuration of

security-monitor/src/non_confidential_flow/handlers/cove_host_extension/get_security_monitor_info.rs:18

ClassHandleInterrupt

Handles an interrupt that occured during the execution of a confidential hart. The control flows (a) to the hypervisor when an interrupt comes from a

security-monitor/src/confidential_flow/handlers/interrupts/handle_interrupt.rs:13

EnumHardwareExtension

security-monitor/src/core/architecture/riscv/extensions/mod.rs:12

ClassHardwareHart

security-monitor/src/core/control_data/hardware_hart.rs:24

ClassHardwareSetup

security-monitor/src/core/hardware_setup/mod.rs:14

security-monitor/rust-crates/flattened_device_tree/src/lib.rs:99

ClassHartArchitecturalState

security-monitor/src/core/architecture/riscv/hart_architectural_state.rs:10

EnumHartLifecycleState

security-monitor/src/core/architecture/riscv/hart_lifecycle_state.rs:13

Represents the CSR that configures the G-stage address translation protocol.

security-monitor/src/core/architecture/riscv/mmu/hgatp.rs:28

Represents the mode implemented by the MMU for the G-stage address translation

security-monitor/src/core/architecture/riscv/mmu/hgatp.rs:8

EnumHsmExtension

security-monitor/src/core/architecture/riscv/sbi/hsm_extension.rs:6

ClassHypervisorHart

security-monitor/src/core/control_data/hypervisor_hart.rs:17

ClassHypervisorMemoryProtector

Exposes an interface to configure the hardware memory isolation component to set memory access protection preventing the hypervisor from accessing mem

security-monitor/src/core/memory_protector/hypervisor_memory_protector.rs:11

ClassInterruptController

Interrupt controller abstract the functionality needed by the security monitor to interact with hart/device interrupts.

security-monitor/src/core/interrupt_controller/mod.rs:20

EnumIpiExtension

security-monitor/src/core/architecture/riscv/sbi/ipi_extension.rs:6

ClassLinkedListAllocator

security-monitor/src/core/heap_allocator/allocator.rs:49

security-monitor/src/core/heap_allocator/allocator.rs:30

security-monitor/rust-crates/riscv_cove_tap/src/spec.rs:19

EnumLockboxAlgorithm

security-monitor/rust-crates/riscv_cove_tap/src/spec.rs:45

A wrapper around spin::Mutex to permit trait implementations.

security-monitor/src/core/heap_allocator/allocator.rs:16

EnumLogicalPageTableEntry

security-monitor/src/core/architecture/riscv/mmu/page_table_entry.rs:16

ClassMemoryLayout

security-monitor/src/core/memory_layout/mod.rs:39

ClassMmioLoadPending

Information stored in the confidential hart that requested MMIO load and is waiting for the response.

security-monitor/src/confidential_flow/handlers/mmio/mmio_load_pending.rs:7

ClassMmioStorePending

Information stored in the confidential hart that requested MMIO store and is waiting for the response.

security-monitor/src/confidential_flow/handlers/mmio/mmio_store_pending.rs:6

EnumNaclExtension

security-monitor/src/core/architecture/riscv/sbi/nacl_extension.rs:9

ClassNaclProbeFeature

Returns information on supported nested acceleration (NACL) features that security monitor implements.

security-monitor/src/non_confidential_flow/handlers/nested_acceleration_extension/nacl_probe_feature.rs:10

ClassNaclSetupSharedMemory

Assigns shared memory between the hypervisor and the security monitor.

security-monitor/src/non_confidential_flow/handlers/nested_acceleration_extension/nacl_setup_shared_memory.rs:11

ClassNaclSharedMemory

Represents the memory region shared between the hypervisor and the security monitor. The content of this memory region is structured according to the

security-monitor/src/core/architecture/riscv/sbi/nacl_extension.rs:46

ClassNoOperation

Implements NOP (no operation) for calls that are not implemented by the security monitor but should be supported due to compatibility reasons. These c

security-monitor/src/confidential_flow/handlers/symmetrical_multiprocessing/no_operation.rs:10

ClassNonConfidentialFlow

Represents the non-confidential part of the finite state machine (FSM), implementing router and exit nodes. It encapsulates the HardwareHart instance,

security-monitor/src/non_confidential_flow/finite_state_machine.rs:31

security-monitor/src/core/page_allocator/page.rs:49

ClassPageAllocator

security-monitor/src/core/page_allocator/allocator.rs:38

security-monitor/src/core/architecture/riscv/mmu/page_size.rs:28

InterfacePageState

security-monitor/src/core/page_allocator/page.rs:17

ClassPageStorageTreeNode

security-monitor/src/core/page_allocator/allocator.rs:337

security-monitor/src/core/architecture/riscv/mmu/page_table.rs:37

EnumPageTableEntry

security-monitor/src/core/architecture/riscv/mmu/page_table_entry.rs:58

EnumPageTableLevel

security-monitor/src/core/architecture/riscv/mmu/page_table_level.rs:9

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