Method begin

src/platforms/arm/lpc/rx_sct_capture.cpp.hpp:351–479

// ============================================================================

bool LpcSctRxChannel::begin(const RxConfig& config) FL_NOEXCEPT {
    mFinished = false;
    mCapacity = config.buffer_size > 0 ? config.buffer_size : 4096u;
    mPrevTick = 0;
    mPrevSeen = false;
    mLastRising = false;
    mEdges.clear();
    mEdges.reserve(mCapacity);

#if defined(FASTLED_LPC_RX_SCT) && defined(FL_IS_ARM_LPC_845)
    // ---- 1. Power up SCT + SWM (and DMA when the DMA path is opted in),
    //         then pulse their resets. ----
    reg(kSysconBase, kOffSYSAHBCLKCTRL0) |= (kClkSCT | kClkSWM
#if defined(FASTLED_LPC_RX_SCT_DMA)
        | kClkDMA
#endif
        );
    volatile fl::u32& presetctrl = reg(kSysconBase, kOffPRESETCTRL0);
    presetctrl &= ~(kRstSCT | kRstSWM
#if defined(FASTLED_LPC_RX_SCT_DMA)
        | kRstDMA
#endif
        );   // assert reset (low pulse)
    presetctrl |=  (kRstSCT | kRstSWM
#if defined(FASTLED_LPC_RX_SCT_DMA)
        | kRstDMA
#endif
        );   // release reset

    // ---- 2. Route mPin -> SCT input 0 via SWM PINASSIGN6 byte[31:24]. ----
    swmAssignSctInput0(static_cast<fl::u8>(mPin & 0xFFu));

    // ---- 3. Configure SCT: UNIFY counter + INSYNC for input 0. ----
    // The 2-clock synchronizer adds ~67 ns of capture jitter at F_CPU=30 MHz,
    // well below the WS2812 T0H/T1H discrimination window (~500 ns margin).
    sct(kOffCTRL)    = kCtrlHaltL | kCtrlClrCtrL;   // halted, counter zeroed
    sct(kOffCONFIG)  = kCfgUnify  | kCfgInsync0;
    sct(kOffLIMIT)   = 0u;                          // free-running counter
    sct(kOffCOUNT)   = 0u;

    // ---- 4. Mark register slots 0 + 1 as CAPTURE (REGMODE bits 0,1 = 1). ----
    sct(kOffREGMODE) = (1u << 0) | (1u << 1);

    // ---- 5. Event 0 → rising edge on SCT input 0 → captures into CAP[0].
    //         Event 1 → falling edge on SCT input 0 → captures into CAP[1].
    sct_ev_state(0) = 0x1u;   // active in STATE 0
    sct_ev_ctrl (0) = evCtrlInputCapture(0u, kIoCondRise);
    sct_ev_state(1) = 0x1u;
    sct_ev_ctrl (1) = evCtrlInputCapture(0u, kIoCondFall);

    sct_capctrl(0) = (1u << 0);   // EV0 loads CAP[0]
    sct_capctrl(1) = (1u << 1);   // EV1 loads CAP[1]

    sct(kOffEVEN)   = 0u;                        // polling mode — IRQs off
    sct(kOffEVFLAG) = 0xFFu;                     // clear any stale flags

#if defined(FASTLED_LPC_RX_SCT_DMA)
    // ---- 6. SCT → DMA wiring. ----