| 200 | inline volatile fl::u32& sct_ev_state(fl::u32 n) FL_NOEXCEPT { return reg(kSctBase, kOffEV0_STATE + 8u * n); } |
| 201 | inline volatile fl::u32& sct_ev_ctrl(fl::u32 n) FL_NOEXCEPT { return reg(kSctBase, kOffEV0_CTRL + 8u * n); } |
| 202 | inline fl::u32* sct_cap_addr(fl::u32 n) FL_NOEXCEPT { |
| 203 | return reinterpret_cast<fl::u32*>(kSctBase + kOffMATCH0 + 4u * n); // ok reinterpret cast — DMA src address |
| 204 | } |
| 205 | inline volatile fl::u32& dma(fl::u32 offset) FL_NOEXCEPT { return reg(kDmaBase, offset); } |
| 206 | |
| 207 | // Assign or unassign the user's GPIO pin to SCT input 0 (SCT0_GPIO_IN_A_I) |