Processor Info and Features bits

2: Cache and TLB information

4: Deterministic cache parameters for each level

Hypervisor CPUID information leaf

Hypervisor CPUID information leaf

Highest extended function implemented

Extended processor and feature bits

Processor brand string

L1 Cache and TLB identifiers

L2 Cache identifiers

Advanced power management

Virtual and physical address sizes

TLB 1GB page identifiers

Deterministic cache parameters for each level

Equivalent to seccomp(SECCOMP_GET_ACTION_AVAIL, ...);

This returns the size of the LiveVMARegion in addition to the flex set that tracks the used data The LiveVMARegion lives at the start of the VMA regio

All feature flag fields are 4-bits.