* Apply an AMD ET configuration to the corresponding MSR. */
| 1148 | * Apply an AMD ET configuration to the corresponding MSR. |
| 1149 | */ |
| 1150 | static void |
| 1151 | amd_thresholding_start(struct amd_et_state *cc, int bank) |
| 1152 | { |
| 1153 | uint64_t misc; |
| 1154 | |
| 1155 | KASSERT(amd_elvt >= 0, ("ELVT offset is not set")); |
| 1156 | |
| 1157 | misc = rdmsr(mca_msr_ops.misc(bank)); |
| 1158 | |
| 1159 | misc &= ~MC_MISC_AMD_INT_MASK; |
| 1160 | misc |= MC_MISC_AMD_INT_LVT; |
| 1161 | |
| 1162 | misc &= ~MC_MISC_AMD_LVT_MASK; |
| 1163 | misc |= (uint64_t)amd_elvt << MC_MISC_AMD_LVT_SHIFT; |
| 1164 | |
| 1165 | misc &= ~MC_MISC_AMD_CNT_MASK; |
| 1166 | misc |= (uint64_t)(MC_MISC_AMD_CNT_MAX - cc->cur_threshold) |
| 1167 | << MC_MISC_AMD_CNT_SHIFT; |
| 1168 | |
| 1169 | misc &= ~MC_MISC_AMD_OVERFLOW; |
| 1170 | misc |= MC_MISC_AMD_CNTEN; |
| 1171 | |
| 1172 | wrmsr(mca_msr_ops.misc(bank), misc); |
| 1173 | } |
| 1174 | |
| 1175 | static void |
| 1176 | amd_thresholding_monitor(int i) |
no test coverage detected