* Sets up the hardware to properly generate MSI-X interrupts * @hw * board private structure */
| 3931 | * board private structure |
| 3932 | */ |
| 3933 | static void |
| 3934 | txgbe_configure_msix(struct rte_eth_dev *dev) |
| 3935 | { |
| 3936 | struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); |
| 3937 | struct rte_intr_handle *intr_handle = pci_dev->intr_handle; |
| 3938 | struct txgbe_hw *hw = TXGBE_DEV_HW(dev); |
| 3939 | uint32_t queue_id, base = TXGBE_MISC_VEC_ID; |
| 3940 | uint32_t vec = TXGBE_MISC_VEC_ID; |
| 3941 | uint32_t gpie; |
| 3942 | |
| 3943 | /* won't configure msix register if no mapping is done |
| 3944 | * between intr vector and event fd |
| 3945 | * but if misx has been enabled already, need to configure |
| 3946 | * auto clean, auto mask and throttling. |
| 3947 | */ |
| 3948 | gpie = rd32(hw, TXGBE_GPIE); |
| 3949 | if (!rte_intr_dp_is_en(intr_handle) && |
| 3950 | !(gpie & TXGBE_GPIE_MSIX)) |
| 3951 | return; |
| 3952 | |
| 3953 | if (rte_intr_allow_others(intr_handle)) { |
| 3954 | base = TXGBE_RX_VEC_START; |
| 3955 | vec = base; |
| 3956 | } |
| 3957 | |
| 3958 | /* setup GPIE for MSI-x mode */ |
| 3959 | gpie = rd32(hw, TXGBE_GPIE); |
| 3960 | gpie |= TXGBE_GPIE_MSIX; |
| 3961 | wr32(hw, TXGBE_GPIE, gpie); |
| 3962 | |
| 3963 | /* Populate the IVAR table and set the ITR values to the |
| 3964 | * corresponding register. |
| 3965 | */ |
| 3966 | if (rte_intr_dp_is_en(intr_handle)) { |
| 3967 | for (queue_id = 0; queue_id < dev->data->nb_rx_queues; |
| 3968 | queue_id++) { |
| 3969 | /* by default, 1:1 mapping */ |
| 3970 | txgbe_set_ivar_map(hw, 0, queue_id, vec); |
| 3971 | rte_intr_vec_list_index_set(intr_handle, |
| 3972 | queue_id, vec); |
| 3973 | if (vec < base + rte_intr_nb_efd_get(intr_handle) |
| 3974 | - 1) |
| 3975 | vec++; |
| 3976 | } |
| 3977 | |
| 3978 | txgbe_set_ivar_map(hw, -1, 1, TXGBE_MISC_VEC_ID); |
| 3979 | } |
| 3980 | wr32(hw, TXGBE_ITR(TXGBE_MISC_VEC_ID), |
| 3981 | TXGBE_ITR_IVAL_10G(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT) |
| 3982 | | TXGBE_ITR_WRDSA); |
| 3983 | } |
| 3984 | |
| 3985 | int |
| 3986 | txgbe_set_queue_rate_limit(struct rte_eth_dev *dev, |
no test coverage detected