* Initialize Tx UAR registers for primary process. * * @param txq * Pointer to Tx queue structure. */
| 45 | * Pointer to Tx queue structure. |
| 46 | */ |
| 47 | static void |
| 48 | txq_uar_init(struct txq *txq) |
| 49 | { |
| 50 | struct mlx4_priv *priv = txq->priv; |
| 51 | struct mlx4_proc_priv *ppriv = MLX4_PROC_PRIV(PORT_ID(priv)); |
| 52 | |
| 53 | MLX4_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); |
| 54 | MLX4_ASSERT(ppriv); |
| 55 | ppriv->uar_table[txq->stats.idx] = txq->msq.db; |
| 56 | } |
| 57 | |
| 58 | #ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET |
| 59 | /** |
no test coverage detected