* DPDK callback to configure a Tx queue. * * @param dev * Pointer to Ethernet device structure. * @param idx * Tx queue index. * @param desc * Number of descriptors to configure in queue. * @param socket * NUMA socket on which memory must be allocated. * @param[in] conf * Thresholds parameters. * * @return * 0 on success, negative errno value otherwise and rte_errno is se
| 309 | * 0 on success, negative errno value otherwise and rte_errno is set. |
| 310 | */ |
| 311 | int |
| 312 | mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, |
| 313 | unsigned int socket, const struct rte_eth_txconf *conf) |
| 314 | { |
| 315 | struct mlx4_priv *priv = dev->data->dev_private; |
| 316 | struct mlx4dv_obj mlxdv; |
| 317 | struct mlx4dv_qp dv_qp; |
| 318 | struct mlx4dv_cq dv_cq; |
| 319 | struct txq_elt (*elts)[rte_align32pow2(desc)]; |
| 320 | struct ibv_qp_init_attr qp_init_attr; |
| 321 | struct txq *txq; |
| 322 | uint8_t *bounce_buf; |
| 323 | struct mlx4_malloc_vec vec[] = { |
| 324 | { |
| 325 | .align = RTE_CACHE_LINE_SIZE, |
| 326 | .size = sizeof(*txq), |
| 327 | .addr = (void **)&txq, |
| 328 | }, |
| 329 | { |
| 330 | .align = RTE_CACHE_LINE_SIZE, |
| 331 | .size = sizeof(*elts), |
| 332 | .addr = (void **)&elts, |
| 333 | }, |
| 334 | { |
| 335 | .align = RTE_CACHE_LINE_SIZE, |
| 336 | .size = MLX4_MAX_WQE_SIZE, |
| 337 | .addr = (void **)&bounce_buf, |
| 338 | }, |
| 339 | }; |
| 340 | int ret; |
| 341 | uint64_t offloads; |
| 342 | |
| 343 | offloads = conf->offloads | dev->data->dev_conf.txmode.offloads; |
| 344 | DEBUG("%p: configuring queue %u for %u descriptors", |
| 345 | (void *)dev, idx, desc); |
| 346 | if (idx >= dev->data->nb_tx_queues) { |
| 347 | rte_errno = EOVERFLOW; |
| 348 | ERROR("%p: queue index out of range (%u >= %u)", |
| 349 | (void *)dev, idx, dev->data->nb_tx_queues); |
| 350 | return -rte_errno; |
| 351 | } |
| 352 | txq = dev->data->tx_queues[idx]; |
| 353 | if (txq) { |
| 354 | rte_errno = EEXIST; |
| 355 | DEBUG("%p: Tx queue %u already configured, release it first", |
| 356 | (void *)dev, idx); |
| 357 | return -rte_errno; |
| 358 | } |
| 359 | if (!desc) { |
| 360 | rte_errno = EINVAL; |
| 361 | ERROR("%p: invalid number of Tx descriptors", (void *)dev); |
| 362 | return -rte_errno; |
| 363 | } |
| 364 | if (desc != RTE_DIM(*elts)) { |
| 365 | desc = RTE_DIM(*elts); |
| 366 | WARN("%p: increased number of descriptors in Tx queue %u" |
| 367 | " to the next power of two (%u)", |
| 368 | (void *)dev, idx, desc); |
nothing calls this directly
no test coverage detected