| 3696 | } |
| 3697 | |
| 3698 | static void |
| 3699 | ixgbe_rss_configure(struct rte_eth_dev *dev) |
| 3700 | { |
| 3701 | struct rte_eth_rss_conf rss_conf; |
| 3702 | struct ixgbe_adapter *adapter; |
| 3703 | struct ixgbe_hw *hw; |
| 3704 | uint32_t reta; |
| 3705 | uint16_t i; |
| 3706 | uint16_t j; |
| 3707 | uint16_t sp_reta_size; |
| 3708 | uint32_t reta_reg; |
| 3709 | |
| 3710 | PMD_INIT_FUNC_TRACE(); |
| 3711 | adapter = dev->data->dev_private; |
| 3712 | hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); |
| 3713 | |
| 3714 | sp_reta_size = ixgbe_reta_size_get(hw->mac.type); |
| 3715 | |
| 3716 | /* |
| 3717 | * Fill in redirection table |
| 3718 | * The byte-swap is needed because NIC registers are in |
| 3719 | * little-endian order. |
| 3720 | */ |
| 3721 | if (adapter->rss_reta_updated == 0) { |
| 3722 | reta = 0; |
| 3723 | for (i = 0, j = 0; i < sp_reta_size; i++, j++) { |
| 3724 | reta_reg = ixgbe_reta_reg_get(hw->mac.type, i); |
| 3725 | |
| 3726 | if (j == dev->data->nb_rx_queues) |
| 3727 | j = 0; |
| 3728 | reta = (reta << 8) | j; |
| 3729 | if ((i & 3) == 3) |
| 3730 | IXGBE_WRITE_REG(hw, reta_reg, |
| 3731 | rte_bswap32(reta)); |
| 3732 | } |
| 3733 | } |
| 3734 | |
| 3735 | /* |
| 3736 | * Configure the RSS key and the RSS protocols used to compute |
| 3737 | * the RSS hash of input packets. |
| 3738 | */ |
| 3739 | rss_conf = dev->data->dev_conf.rx_adv_conf.rss_conf; |
| 3740 | if ((rss_conf.rss_hf & IXGBE_RSS_OFFLOAD_ALL) == 0) { |
| 3741 | ixgbe_rss_disable(dev); |
| 3742 | return; |
| 3743 | } |
| 3744 | if (rss_conf.rss_key == NULL) |
| 3745 | rss_conf.rss_key = rss_intel_key; /* Default hash key */ |
| 3746 | ixgbe_hw_rss_hash_set(hw, &rss_conf); |
| 3747 | } |
| 3748 | |
| 3749 | #define NUM_VFTA_REGISTERS 128 |
| 3750 | #define NIC_RX_BUFFER_SIZE 0x200 |
no test coverage detected