| 6047 | } |
| 6048 | |
| 6049 | static void |
| 6050 | ixgbevf_set_ivar_map(struct ixgbe_hw *hw, int8_t direction, |
| 6051 | uint8_t queue, uint8_t msix_vector) |
| 6052 | { |
| 6053 | uint32_t tmp, idx; |
| 6054 | |
| 6055 | if (direction == -1) { |
| 6056 | /* other causes */ |
| 6057 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; |
| 6058 | tmp = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC); |
| 6059 | tmp &= ~0xFF; |
| 6060 | tmp |= msix_vector; |
| 6061 | IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, tmp); |
| 6062 | } else { |
| 6063 | /* rx or tx cause */ |
| 6064 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; |
| 6065 | idx = ((16 * (queue & 1)) + (8 * direction)); |
| 6066 | tmp = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1)); |
| 6067 | tmp &= ~(0xFF << idx); |
| 6068 | tmp |= (msix_vector << idx); |
| 6069 | IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), tmp); |
| 6070 | } |
| 6071 | } |
| 6072 | |
| 6073 | /** |
| 6074 | * set the IVAR registers, mapping interrupt causes to vectors |
no outgoing calls
no test coverage detected