* ixgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo * @hw: pointer to the hardware structure * * The 82599 and x540 MACs can experience issues if TX work is still pending * when a reset occurs. This function prevents this by flushing the PCIe * buffers on the system. **/
| 4759 | * buffers on the system. |
| 4760 | **/ |
| 4761 | void ixgbe_clear_tx_pending(struct ixgbe_hw *hw) |
| 4762 | { |
| 4763 | u32 gcr_ext, hlreg0, i, poll; |
| 4764 | u16 value; |
| 4765 | |
| 4766 | /* |
| 4767 | * If double reset is not requested then all transactions should |
| 4768 | * already be clear and as such there is no work to do |
| 4769 | */ |
| 4770 | if (!(hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED)) |
| 4771 | return; |
| 4772 | |
| 4773 | /* |
| 4774 | * Set loopback enable to prevent any transmits from being sent |
| 4775 | * should the link come up. This assumes that the RXCTRL.RXEN bit |
| 4776 | * has already been cleared. |
| 4777 | */ |
| 4778 | hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); |
| 4779 | IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0 | IXGBE_HLREG0_LPBK); |
| 4780 | |
| 4781 | /* Wait for a last completion before clearing buffers */ |
| 4782 | IXGBE_WRITE_FLUSH(hw); |
| 4783 | msec_delay(3); |
| 4784 | |
| 4785 | /* |
| 4786 | * Before proceeding, make sure that the PCIe block does not have |
| 4787 | * transactions pending. |
| 4788 | */ |
| 4789 | poll = ixgbe_pcie_timeout_poll(hw); |
| 4790 | for (i = 0; i < poll; i++) { |
| 4791 | usec_delay(100); |
| 4792 | value = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_STATUS); |
| 4793 | if (IXGBE_REMOVED(hw->hw_addr)) |
| 4794 | goto out; |
| 4795 | if (!(value & IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING)) |
| 4796 | goto out; |
| 4797 | } |
| 4798 | |
| 4799 | out: |
| 4800 | /* initiate cleaning flow for buffers in the PCIe transaction layer */ |
| 4801 | gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); |
| 4802 | IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, |
| 4803 | gcr_ext | IXGBE_GCR_EXT_BUFFERS_CLEAR); |
| 4804 | |
| 4805 | /* Flush all writes and allow 20usec for all transactions to clear */ |
| 4806 | IXGBE_WRITE_FLUSH(hw); |
| 4807 | usec_delay(20); |
| 4808 | |
| 4809 | /* restore previous register values */ |
| 4810 | IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); |
| 4811 | IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); |
| 4812 | } |
| 4813 | |
| 4814 | STATIC const u8 ixgbe_emc_temp_data[4] = { |
| 4815 | IXGBE_EMC_INTERNAL_DATA, |
no test coverage detected