| 2766 | } |
| 2767 | |
| 2768 | void |
| 2769 | i40e_reset_tx_queue(struct i40e_tx_queue *txq) |
| 2770 | { |
| 2771 | struct i40e_tx_entry *txe; |
| 2772 | uint16_t i, prev, size; |
| 2773 | |
| 2774 | if (!txq) { |
| 2775 | PMD_DRV_LOG(DEBUG, "Pointer to txq is NULL"); |
| 2776 | return; |
| 2777 | } |
| 2778 | |
| 2779 | txe = txq->sw_ring; |
| 2780 | size = sizeof(struct i40e_tx_desc) * txq->nb_tx_desc; |
| 2781 | for (i = 0; i < size; i++) |
| 2782 | ((volatile char *)txq->tx_ring)[i] = 0; |
| 2783 | |
| 2784 | prev = (uint16_t)(txq->nb_tx_desc - 1); |
| 2785 | for (i = 0; i < txq->nb_tx_desc; i++) { |
| 2786 | volatile struct i40e_tx_desc *txd = &txq->tx_ring[i]; |
| 2787 | |
| 2788 | txd->cmd_type_offset_bsz = |
| 2789 | rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE); |
| 2790 | txe[i].mbuf = NULL; |
| 2791 | txe[i].last_id = i; |
| 2792 | txe[prev].next_id = i; |
| 2793 | prev = i; |
| 2794 | } |
| 2795 | |
| 2796 | txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1); |
| 2797 | txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1); |
| 2798 | |
| 2799 | txq->tx_tail = 0; |
| 2800 | txq->nb_tx_used = 0; |
| 2801 | |
| 2802 | txq->last_desc_cleaned = (uint16_t)(txq->nb_tx_desc - 1); |
| 2803 | txq->nb_tx_free = (uint16_t)(txq->nb_tx_desc - 1); |
| 2804 | } |
| 2805 | |
| 2806 | /* Init the TX queue in hardware */ |
| 2807 | int |
no outgoing calls
no test coverage detected