| 2280 | } |
| 2281 | |
| 2282 | int |
| 2283 | i40e_dev_tx_queue_setup(struct rte_eth_dev *dev, |
| 2284 | uint16_t queue_idx, |
| 2285 | uint16_t nb_desc, |
| 2286 | unsigned int socket_id, |
| 2287 | const struct rte_eth_txconf *tx_conf) |
| 2288 | { |
| 2289 | struct i40e_vsi *vsi; |
| 2290 | struct i40e_pf *pf = NULL; |
| 2291 | struct i40e_tx_queue *txq; |
| 2292 | const struct rte_memzone *tz; |
| 2293 | uint32_t ring_size; |
| 2294 | uint16_t tx_rs_thresh, tx_free_thresh; |
| 2295 | uint16_t reg_idx, i, base, bsf, tc_mapping; |
| 2296 | int q_offset; |
| 2297 | uint64_t offloads; |
| 2298 | |
| 2299 | offloads = tx_conf->offloads | dev->data->dev_conf.txmode.offloads; |
| 2300 | |
| 2301 | pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); |
| 2302 | vsi = i40e_pf_get_vsi_by_qindex(pf, queue_idx); |
| 2303 | if (!vsi) |
| 2304 | return -EINVAL; |
| 2305 | q_offset = i40e_get_queue_offset_by_qindex(pf, queue_idx); |
| 2306 | if (q_offset < 0) |
| 2307 | return -EINVAL; |
| 2308 | reg_idx = vsi->base_queue + q_offset; |
| 2309 | |
| 2310 | if (nb_desc % I40E_ALIGN_RING_DESC != 0 || |
| 2311 | (nb_desc > I40E_MAX_RING_DESC) || |
| 2312 | (nb_desc < I40E_MIN_RING_DESC)) { |
| 2313 | PMD_DRV_LOG(ERR, "Number (%u) of transmit descriptors is " |
| 2314 | "invalid", nb_desc); |
| 2315 | return -EINVAL; |
| 2316 | } |
| 2317 | |
| 2318 | /** |
| 2319 | * The following two parameters control the setting of the RS bit on |
| 2320 | * transmit descriptors. TX descriptors will have their RS bit set |
| 2321 | * after txq->tx_rs_thresh descriptors have been used. The TX |
| 2322 | * descriptor ring will be cleaned after txq->tx_free_thresh |
| 2323 | * descriptors are used or if the number of descriptors required to |
| 2324 | * transmit a packet is greater than the number of free TX descriptors. |
| 2325 | * |
| 2326 | * The following constraints must be satisfied: |
| 2327 | * - tx_rs_thresh must be greater than 0. |
| 2328 | * - tx_rs_thresh must be less than the size of the ring minus 2. |
| 2329 | * - tx_rs_thresh must be less than or equal to tx_free_thresh. |
| 2330 | * - tx_rs_thresh must be a divisor of the ring size. |
| 2331 | * - tx_free_thresh must be greater than 0. |
| 2332 | * - tx_free_thresh must be less than the size of the ring minus 3. |
| 2333 | * - tx_free_thresh + tx_rs_thresh must not exceed nb_desc. |
| 2334 | * |
| 2335 | * One descriptor in the TX ring is used as a sentinel to avoid a H/W |
| 2336 | * race condition, hence the maximum threshold constraints. When set |
| 2337 | * to zero use default values. |
| 2338 | */ |
| 2339 | tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ? |
nothing calls this directly
no test coverage detected