| 1691 | } |
| 1692 | |
| 1693 | int |
| 1694 | i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) |
| 1695 | { |
| 1696 | struct i40e_rx_queue *rxq; |
| 1697 | int err; |
| 1698 | struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); |
| 1699 | |
| 1700 | PMD_INIT_FUNC_TRACE(); |
| 1701 | |
| 1702 | rxq = dev->data->rx_queues[rx_queue_id]; |
| 1703 | if (!rxq || !rxq->q_set) { |
| 1704 | PMD_DRV_LOG(ERR, "RX queue %u not available or setup", |
| 1705 | rx_queue_id); |
| 1706 | return -EINVAL; |
| 1707 | } |
| 1708 | |
| 1709 | if (rxq->rx_deferred_start) |
| 1710 | PMD_DRV_LOG(WARNING, "RX queue %u is deferred start", |
| 1711 | rx_queue_id); |
| 1712 | |
| 1713 | err = i40e_alloc_rx_queue_mbufs(rxq); |
| 1714 | if (err) { |
| 1715 | PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf"); |
| 1716 | return err; |
| 1717 | } |
| 1718 | |
| 1719 | /* Init the RX tail register. */ |
| 1720 | I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); |
| 1721 | |
| 1722 | err = i40e_switch_rx_queue(hw, rxq->reg_idx, TRUE); |
| 1723 | if (err) { |
| 1724 | PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on", |
| 1725 | rx_queue_id); |
| 1726 | |
| 1727 | i40e_rx_queue_release_mbufs(rxq); |
| 1728 | i40e_reset_rx_queue(rxq); |
| 1729 | return err; |
| 1730 | } |
| 1731 | dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED; |
| 1732 | |
| 1733 | return 0; |
| 1734 | } |
| 1735 | |
| 1736 | int |
| 1737 | i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) |
no test coverage detected